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| author |   Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2019-03-20 12:27:32 +0000 |
|---|---|---|
| committer |   Chris Wilson <chris@chris-wilson.co.uk> | 2019-03-20 20:25:45 +0000 |
| commit | 159367bb9e7439b8c1c4c066596a1663b901647b (patch) | |
| tree | 3433055aa6a669a8f970fdf338017c9015d8d247 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | drm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro (diff) | |
| download | linux-dev-159367bb9e7439b8c1c4c066596a1663b901647b.tar.xz linux-dev-159367bb9e7439b8c1c4c066596a1663b901647b.zip | |
drm/i915: always use masks on FW regs
Upper bits are reserved on gen6, so no issue if we write them. Note that
we're already doing this in the non-MT case of IVB, which uses the same
register.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190320122732.14512-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
0 files changed, 0 insertions, 0 deletions