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| author |   Shobhit Kumar <shobhit.kumar@intel.com> | 2013-12-10 12:14:55 +0530 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-12-11 23:52:17 +0100 |
| commit | e9fe51c6656f7fd4fad38869cb70a42e65ec0ba9 (patch) | |
| tree | a8a7e936ec5aa8b4ec3f460f900853d396c947a8 /drivers/gpu/drm/i915/intel_sideband.c | |
| parent | drm/i915: Add more dev ops for MIPI sub encoder (diff) | |
| download | linux-dev-e9fe51c6656f7fd4fad38869cb70a42e65ec0ba9.tar.xz linux-dev-e9fe51c6656f7fd4fad38869cb70a42e65ec0ba9.zip | |
drm/i915: Use FLISDSI interface for band gap reset
v2: Rebased on latest code
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
Reviewed-by: Jani Nikula<jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sideband.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_sideband.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c index cc6fbcde7d3d..0954f132726e 100644 --- a/drivers/gpu/drm/i915/intel_sideband.c +++ b/drivers/gpu/drm/i915/intel_sideband.c @@ -249,3 +249,17 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value, return; } } + +u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg) +{ + u32 val = 0; + vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_FLISDSI, + DPIO_OPCODE_REG_READ, reg, &val); + return val; +} + +void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val) +{ + vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_FLISDSI, + DPIO_OPCODE_REG_WRITE, reg, &val); +} |