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authorPaul Cercueil <paul@crapouillou.net>2021-10-26 19:12:38 +0100
committerPaul Cercueil <paul@crapouillou.net>2021-10-29 21:30:07 +0100
commit5410345f7acb4e84825e7e02f68480c95f3b7b15 (patch)
tree11f8fd4a178af1e9f85d734afd919713d01a5e51 /drivers/gpu/drm/ingenic
parentdrm/ingenic: Move IPU scale settings to private state (diff)
downloadlinux-dev-5410345f7acb4e84825e7e02f68480c95f3b7b15.tar.xz
linux-dev-5410345f7acb4e84825e7e02f68480c95f3b7b15.zip
drm/ingenic: Set DMA descriptor chain register when starting CRTC
Setting the DMA descriptor chain register in the probe function has been fine until now, because we only ever had one descriptor per foreground. As the driver will soon have real descriptor chains, and the DMA descriptor chain register updates itself to point to the current descriptor being processed, this register needs to be reset after a full modeset to point to the first descriptor of the chain. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://patchwork.freedesktop.org/patch/msgid/20211026181240.213806-5-paul@crapouillou.net Tested-by: Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Christophe Branchereau <cbranchereau@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/ingenic')
-rw-r--r--drivers/gpu/drm/ingenic/ingenic-drm-drv.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index 5dbeca0f8f37..cbc76cede99e 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -186,6 +186,10 @@ static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,
regmap_write(priv->map, JZ_REG_LCD_STATE, 0);
+ /* Set address of our DMA descriptor chain */
+ regmap_write(priv->map, JZ_REG_LCD_DA0, dma_hwdesc_addr(priv, 0));
+ regmap_write(priv->map, JZ_REG_LCD_DA1, dma_hwdesc_addr(priv, 1));
+
regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE,
JZ_LCD_CTRL_ENABLE);