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| author |   stu.hsieh@mediatek.com <stu.hsieh@mediatek.com> | 2018-06-20 16:19:23 +0800 |
|---|---|---|
| committer |   CK Hu <ck.hu@mediatek.com> | 2018-06-24 12:07:02 +0800 |
| commit | 7ddac091673c576f010aca262bb56f5e25fc5577 (patch) | |
| tree | d9526b5f8d618a3e1fbec761ec7390a32dca551d /drivers/gpu/drm/mediatek/mtk_drm_ddp.c | |
| parent | drm/mediatek: add connection from RDMA2 to DPI0 (diff) | |
| download | linux-dev-7ddac091673c576f010aca262bb56f5e25fc5577.tar.xz linux-dev-7ddac091673c576f010aca262bb56f5e25fc5577.zip | |
drm/mediatek: add connection from RDMA2 to DPI1
This patch add the connection from RDMA2 to DPI1
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_drm_ddp.c')
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index c88742a6c2b9..a4b418302f32 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -93,9 +93,11 @@ #define RDMA1_SOUT_DSI2 0x4 #define RDMA1_SOUT_DSI3 0x5 #define RDMA2_SOUT_DPI0 0x2 +#define RDMA2_SOUT_DPI1 0x3 #define DPI0_SEL_IN_RDMA1 0x1 #define DPI0_SEL_IN_RDMA2 0x3 #define DPI1_SEL_IN_RDMA1 (0x1 << 8) +#define DPI1_SEL_IN_RDMA2 (0x3 << 8) #define DSI1_SEL_IN_RDMA1 0x1 #define DSI2_SEL_IN_RDMA1 (0x1 << 16) #define DSI3_SEL_IN_RDMA1 (0x1 << 16) @@ -199,6 +201,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI0) { *addr = DISP_REG_CONFIG_DISP_RDMA2_SOUT; value = RDMA2_SOUT_DPI0; + } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) { + *addr = DISP_REG_CONFIG_DISP_RDMA2_SOUT; + value = RDMA2_SOUT_DPI1; } else { value = 0; } @@ -233,6 +238,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI0) { *addr = DISP_REG_CONFIG_DPI_SEL_IN; value = DPI0_SEL_IN_RDMA2; + } else if (cur == DDP_COMPONENT_RDMA2 && next == DDP_COMPONENT_DPI1) { + *addr = DISP_REG_CONFIG_DPI_SEL_IN; + value = DPI1_SEL_IN_RDMA2; } else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) { *addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN; value = COLOR1_SEL_IN_OVL1; |