diff options
author | Jonathan Marek <jonathan@marek.ca> | 2021-06-08 13:27:48 -0400 |
---|---|---|
committer | Rob Clark <robdclark@chromium.org> | 2021-06-23 07:33:55 -0700 |
commit | f6d62d091cfd1c307a1bb83ef46d334d9ac27751 (patch) | |
tree | 9c4535f32643f69f7f89b36a5417aabfa08735b3 /drivers/gpu/drm/msm/adreno/adreno_device.c | |
parent | drm/msm/a6xx: add missing PC_DBG_ECO_CNTL bit for a640/a650 (diff) | |
download | linux-dev-f6d62d091cfd1c307a1bb83ef46d334d9ac27751.tar.xz linux-dev-f6d62d091cfd1c307a1bb83ef46d334d9ac27751.zip |
drm/msm/a6xx: add support for Adreno 660 GPU
Add adreno_is_{a660,a650_family} helpers and convert update existing
adreno_is_a650 usage based on downstream driver's logic (changing into
adreno_is_a650_family or adding adreno_is_a660).
And add the remaining changes required for A660, again based on
the downstream driver: missing GMU allocations, additional register init,
dummy hfi BW table, cp protect list, entry in gpulist table, hwcg table,
updated a6xx_ucode_check_version check.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20210608172808.11803-6-jonathan@marek.ca
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_device.c')
-rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_device.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index b3337b93be91..6dad8015c9a1 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -287,6 +287,19 @@ static const struct adreno_info gpulist[] = { .init = a6xx_gpu_init, .zapfw = "a650_zap.mdt", .hwcg = a650_hwcg, + }, { + .rev = ADRENO_REV(6, 6, 0, ANY_ID), + .revn = 660, + .name = "A660", + .fw = { + [ADRENO_FW_SQE] = "a660_sqe.fw", + [ADRENO_FW_GMU] = "a660_gmu.bin", + }, + .gmem = SZ_1M + SZ_512K, + .inactive_period = DRM_MSM_INACTIVE_PERIOD, + .init = a6xx_gpu_init, + .zapfw = "a660_zap.mdt", + .hwcg = a660_hwcg, }, }; |