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| author |   Akhil P Oommen <quic_akhilpo@quicinc.com> | 2022-02-26 00:51:31 +0530 |
|---|---|---|
| committer |   Rob Clark <robdclark@chromium.org> | 2022-02-25 13:29:57 -0800 |
| commit | afab9d91d872819f98a792c32c302d9e3261f1a1 (patch) | |
| tree | 3a112a88153221f741b565428973606e3d5dd743 /drivers/gpu/drm/msm/adreno/adreno_gpu.h | |
| parent | drm/msm/a6xx: Add support for 7c3 SKUs (diff) | |
| download | linux-dev-afab9d91d872819f98a792c32c302d9e3261f1a1.tar.xz linux-dev-afab9d91d872819f98a792c32c302d9e3261f1a1.zip | |
drm/msm/adreno: Expose speedbin to userspace
Expose speedbin through MSM_PARAM_CHIP_ID parameter to help userspace
identify the sku.
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Link: https://lore.kernel.org/r/20220226005021.v2.4.I86c32730e08cba9e5c83f02ec17885124d45fa56@changeid
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_gpu.h')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 432590036b31..b1ee453d627d 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -80,6 +80,7 @@ struct adreno_gpu { const struct adreno_info *info; uint32_t gmem; /* actual gmem size */ uint32_t revn; /* numeric revision name */ + uint16_t speedbin; const struct adreno_gpu_funcs *funcs; /* interesting register offsets to dump: */ @@ -325,6 +326,8 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, void adreno_set_llc_attributes(struct iommu_domain *iommu); +int adreno_read_speedbin(struct device *dev, u32 *speedbin); + /* * For a5xx and a6xx targets load the zap shader that is used to pull the GPU * out of secure mode |