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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2022-02-17 07:31:45 +0300
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>2022-05-02 02:07:07 +0300
commitc929ac60b3ed34accd25a052a4833e418900f466 (patch)
tree8c228a45c44c0d2e35023afb905e91054296c6cf /drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
parentdrm/msm/dpu: remove always-true argument of dpu_core_irq_read() (diff)
downloadlinux-dev-c929ac60b3ed34accd25a052a4833e418900f466.tar.xz
linux-dev-c929ac60b3ed34accd25a052a4833e418900f466.zip
drm/msm/dpu: allow just single IRQ callback
DPU interrupts code allows multiple callbacks per interrut. In reality none of the interrupts is shared between blocks (and will probably never be). Drop support for registering multiple callbacks per interrupt to simplify interrupt handling code. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/474701/ Link: https://lore.kernel.org/r/20220217043148.480898-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 37379966d8ec..4154c5e2b4ae 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -44,19 +44,21 @@ enum dpu_hw_intr_reg {
* @save_irq_status: array of IRQ status reg storage created during init
* @total_irqs: total number of irq_idx mapped in the hw_interrupts
* @irq_lock: spinlock for accessing IRQ resources
- * @irq_cb_tbl: array of IRQ callbacks lists
- * @irq_counts: array of IRQ counts
+ * @irq_cb_tbl: array of IRQ callbacks
*/
struct dpu_hw_intr {
struct dpu_hw_blk_reg_map hw;
- u32 *cache_irq_mask;
+ u32 cache_irq_mask[MDP_INTR_MAX];
u32 *save_irq_status;
u32 total_irqs;
spinlock_t irq_lock;
unsigned long irq_mask;
- struct list_head *irq_cb_tbl;
- atomic_t *irq_counts;
+ struct {
+ void (*cb)(void *arg, int irq_idx);
+ void *arg;
+ atomic_t count;
+ } irq_tbl[];
};
/**