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authorJeykumar Sankaran <jsanka@codeaurora.org>2018-09-05 19:08:10 -0700
committerRob Clark <robdclark@gmail.com>2018-10-03 20:24:50 -0400
commitad8e5c2d7729e2a6f0b5ce3c0e90ab68c40156b8 (patch)
tree140dd03d7d61a181340ffdfcaedeaa139135f895 /drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
parentdrm/msm/dpu: Remove dpu_mdss_isr when dpu_mdss_destroy is called (diff)
downloadlinux-dev-ad8e5c2d7729e2a6f0b5ce3c0e90ab68c40156b8.tar.xz
linux-dev-ad8e5c2d7729e2a6f0b5ce3c0e90ab68c40156b8.zip
drm/msm/dpu: remove debugfs support for misr
MISR support is the debug feature present in Snapdragon chipsets. At the layer mixer and interfaces, MISR algorithm can generate CRC signatures of the pixel data which can be used for validating the frames generated. Since there are no clients for this feature, strip down the support from the driver. changes in v4: - changed introduced in the series changes in v5: - update commit text with the need for the change(Sean) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
index 1240f505ca53..cb02041e1a22 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
@@ -325,12 +325,6 @@ int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off);
#define DPU_REG_WRITE(c, off, val) dpu_reg_write(c, off, val, #off)
#define DPU_REG_READ(c, off) dpu_reg_read(c, off)
-#define MISR_FRAME_COUNT_MASK 0xFF
-#define MISR_CTRL_ENABLE BIT(8)
-#define MISR_CTRL_STATUS BIT(9)
-#define MISR_CTRL_STATUS_CLEAR BIT(10)
-#define INTF_MISR_CTRL_FREE_RUN_MASK BIT(31)
-
void *dpu_hw_util_get_dir(void);
void dpu_hw_setup_scaler3(struct dpu_hw_blk_reg_map *c,