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authorStephane Viau <sviau@codeaurora.org>2015-03-13 15:49:33 -0400
committerRob Clark <robdclark@gmail.com>2015-04-01 19:29:34 -0400
commit389b09a1822db2bf5050060acc63611ea6c4670d (patch)
tree04e47e953e1695fe8a45955ff9d431a1a67be5cd /drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
parentdrm/msm/mdp5: Enhance operation mode for pipeline configuration (diff)
downloadlinux-dev-389b09a1822db2bf5050060acc63611ea6c4670d.tar.xz
linux-dev-389b09a1822db2bf5050060acc63611ea6c4670d.zip
drm/msm/mdp5: Add START signal to kick off certain pipelines
Some interfaces (WB, DSI Command Mode) need to be kicked off through a START Signal. This signal needs to be sent at the right time and requests in some cases to keep track of the pipeline status (eg: whether pipeline registers are flushed AND output WB buffers are ready, in case of WB interface). Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
index 4e90740c9749..69e35aca80a7 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
@@ -44,6 +44,11 @@ struct mdp5_lm_block {
uint32_t nb_stages; /* number of stages per blender */
};
+struct mdp5_ctl_block {
+ MDP5_SUB_BLOCK_DEFINITION;
+ uint32_t flush_hw_mask; /* FLUSH register's hardware mask */
+};
+
struct mdp5_smp_block {
int mmb_count; /* number of SMP MMBs */
int mmb_size; /* MMB: size in bytes */
@@ -55,7 +60,7 @@ struct mdp5_cfg_hw {
char *name;
struct mdp5_smp_block smp;
- struct mdp5_sub_block ctl;
+ struct mdp5_ctl_block ctl;
struct mdp5_sub_block pipe_vig;
struct mdp5_sub_block pipe_rgb;
struct mdp5_sub_block pipe_dma;