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authorArchit Taneja <architt@codeaurora.org>2017-03-23 15:58:02 +0530
committerRob Clark <robdclark@gmail.com>2017-04-08 06:59:34 -0400
commit894558ec8c4f3e482299905d7f86b7d1c57e1c2f (patch)
tree18dbc383d14228c5bd2b4d43dbbe09bdc14131aa /drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
parentdrm/msm/mdp5: subclass CRTC state (diff)
downloadlinux-dev-894558ec8c4f3e482299905d7f86b7d1c57e1c2f.tar.xz
linux-dev-894558ec8c4f3e482299905d7f86b7d1c57e1c2f.zip
drm/msm/mdp5: Prepare for dynamic assignment of mixers
Add the stuff needed to allow dynamically assigning a mixer to a CRTC. Since mixers are a resource that can be shared across multiple CRTCs, we need to maintain a 'hwmixer_to_crtc' map in the global atomic state, acquire the mdp5_kms.state_lock modeset lock and so on. The mixer is assigned in the CRTC's atomic_check() func, a failure will result in the new state being cleanly rolled back. The mixer assignment itself is straightforward, and almost identical to what we do for hwpipes. We don't need to grab the old hwmixer_to_crtc state like we do in hwpipes since we don't need to compare anything with the old state at the moment. The only LM capability we care about at the moment is whether the mixer instance can be used to display stuff (i.e, connect to an INTF downstream). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
index 12dc94854410..9cfad3defa61 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
@@ -367,6 +367,30 @@ static void mdp5_crtc_enable(struct drm_crtc *crtc)
mdp5_crtc->enabled = true;
}
+int mdp5_crtc_setup_pipeline(struct drm_crtc *crtc,
+ struct drm_crtc_state *new_crtc_state)
+{
+ struct mdp5_crtc_state *mdp5_cstate =
+ to_mdp5_crtc_state(new_crtc_state);
+ struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline;
+ bool new_mixer = false;
+
+ new_mixer = !pipeline->mixer;
+
+ if (new_mixer) {
+ struct mdp5_hw_mixer *old_mixer = pipeline->mixer;
+
+ pipeline->mixer = mdp5_mixer_assign(new_crtc_state->state, crtc,
+ MDP_LM_CAP_DISPLAY);
+ if (IS_ERR(pipeline->mixer))
+ return PTR_ERR(pipeline->mixer);
+
+ mdp5_mixer_release(new_crtc_state->state, old_mixer);
+ }
+
+ return 0;
+}
+
struct plane_state {
struct drm_plane *plane;
struct mdp5_plane_state *state;
@@ -399,6 +423,7 @@ static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,
const struct drm_plane_state *pstate;
bool cursor_plane = false;
int cnt = 0, base = 0, i;
+ int ret;
DBG("%s: check", crtc->name);
@@ -412,6 +437,12 @@ static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,
cursor_plane = true;
}
+ ret = mdp5_crtc_setup_pipeline(crtc, state);
+ if (ret) {
+ dev_err(dev->dev, "couldn't assign mixers %d\n", ret);
+ return ret;
+ }
+
/* assign a stage based on sorted zpos property */
sort(pstates, cnt, sizeof(pstates[0]), pstate_cmp, NULL);