diff options
| author |   Ben Skeggs <bskeggs@redhat.com> | 2013-03-04 15:01:37 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2013-11-08 15:40:19 +1000 |
| commit | aae95ca708140307813e49af6d0d4a7205509129 (patch) | |
| tree | 20acced9f1a88e7be22f8f1c85c8bc610a2932b1 /drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c | |
| parent | drm/nouveau: implement a simple sysfs interface to new pm code (diff) | |
| download | linux-dev-aae95ca708140307813e49af6d0d4a7205509129.tar.xz linux-dev-aae95ca708140307813e49af6d0d4a7205509129.zip | |
drm/nouveau/fb: implement various bits of work towards memory reclocking
Not even remotely ready for the vast majority of the world.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c index ab7ef0ac9e34..baa013afa57b 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnv49.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include "priv.h" +#include "nv40.h" static int nv49_ram_create(struct nouveau_object *parent, struct nouveau_object *engine, @@ -30,7 +30,7 @@ nv49_ram_create(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_object **pobject) { struct nouveau_fb *pfb = nouveau_fb(parent); - struct nouveau_ram *ram; + struct nv40_ram *ram; u32 pfb914 = nv_rd32(pfb, 0x100914); int ret; @@ -40,15 +40,18 @@ nv49_ram_create(struct nouveau_object *parent, struct nouveau_object *engine, return ret; switch (pfb914 & 0x00000003) { - case 0x00000000: ram->type = NV_MEM_TYPE_DDR1; break; - case 0x00000001: ram->type = NV_MEM_TYPE_DDR2; break; - case 0x00000002: ram->type = NV_MEM_TYPE_GDDR3; break; + case 0x00000000: ram->base.type = NV_MEM_TYPE_DDR1; break; + case 0x00000001: ram->base.type = NV_MEM_TYPE_DDR2; break; + case 0x00000002: ram->base.type = NV_MEM_TYPE_GDDR3; break; case 0x00000003: break; } - ram->size = nv_rd32(pfb, 0x10020c) & 0xff000000; - ram->parts = (nv_rd32(pfb, 0x100200) & 0x00000003) + 1; - ram->tags = nv_rd32(pfb, 0x100320); + ram->base.size = nv_rd32(pfb, 0x10020c) & 0xff000000; + ram->base.parts = (nv_rd32(pfb, 0x100200) & 0x00000003) + 1; + ram->base.tags = nv_rd32(pfb, 0x100320); + ram->base.calc = nv40_ram_calc; + ram->base.prog = nv40_ram_prog; + ram->base.tidy = nv40_ram_tidy; return 0; } |