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authorBen Skeggs <bskeggs@redhat.com>2011-10-26 09:11:02 +1000
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 19:01:24 +1000
commitf3fbaf34e2b1459eab248c5f0180928e7861120b (patch)
treebd5bc90f52df47630e67dfd90e707500a88f3634 /drivers/gpu/drm/nouveau/nouveau_perf.c
parentdrm/nv50/pm: s/PLL_UNK05/PLL_VDEC/ (diff)
downloadlinux-dev-f3fbaf34e2b1459eab248c5f0180928e7861120b.tar.xz
linux-dev-f3fbaf34e2b1459eab248c5f0180928e7861120b.zip
drm/nv50/pm: rewrite clock management, and switch to the new pm hooks
This area is horrifically complicated on these chipsets, and it's likely we will need at least a few more tweaks yet. Oh yes, and it's completely disabled on IGPs for the moment. From traces, things look potentially different there yet again. Sigh... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_perf.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_perf.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c
index da584e3a8f6a..6d49bdbf93d0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_perf.c
+++ b/drivers/gpu/drm/nouveau/nouveau_perf.c
@@ -302,6 +302,7 @@ nouveau_perf_init(struct drm_device *dev)
perflvl->shader = ROM16(entry[10]) * 1000;
perflvl->memory = ROM16(entry[12]) * 1000;
perflvl->vdec = ROM16(entry[16]) * 1000;
+ perflvl->dom6 = ROM16(entry[20]) * 1000;
break;
case 0x40:
#define subent(n) (ROM16(entry[perf[2] + ((n) * perf[3])]) & 0xfff) * 1000