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| author |   Ben Skeggs <bskeggs@redhat.com> | 2014-08-10 04:10:25 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-08-10 05:28:05 +1000 |
| commit | 867920f8c920bcaa5a6fa5ebad4596669b82ba80 (patch) | |
| tree | 063aebcdfdeba309f3921d9fe2a8463aec64ff7c /drivers/gpu/drm/nouveau/nvif | |
| parent | drm/nouveau/fifo: allow direct access to channel control registers where possible (diff) | |
| download | linux-dev-867920f8c920bcaa5a6fa5ebad4596669b82ba80.tar.xz linux-dev-867920f8c920bcaa5a6fa5ebad4596669b82ba80.zip | |
drm/nouveau/fifo: implement nvif event source
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvif')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvif/class.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvif/event.h | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvif/class.h b/drivers/gpu/drm/nouveau/nvif/class.h index 476d57a1ed6e..50c5413ff523 100644 --- a/drivers/gpu/drm/nouveau/nvif/class.h +++ b/drivers/gpu/drm/nouveau/nvif/class.h @@ -258,6 +258,7 @@ struct nv03_channel_dma_v0 { __u64 offset; }; +#define G82_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 /******************************************************************************* * GPFIFO channels diff --git a/drivers/gpu/drm/nouveau/nvif/event.h b/drivers/gpu/drm/nouveau/nvif/event.h index cef3ef103be5..21764499b4be 100644 --- a/drivers/gpu/drm/nouveau/nvif/event.h +++ b/drivers/gpu/drm/nouveau/nvif/event.h @@ -51,4 +51,12 @@ struct nvif_notify_conn_rep_v0 { __u8 pad02[6]; }; +struct nvif_notify_uevent_req { + /* nvif_notify_req ... */ +}; + +struct nvif_notify_uevent_rep { + /* nvif_notify_rep ... */ +}; + #endif |