drm/nouveau/ce: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

1 files changed, 50 insertions, 124 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index e86bff94a0f4..14636df82630 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1159,7 +1159,7 @@ nva3_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, nv40_volt_new },
-	.ce[0] = gt215_ce_new,
+	.ce       = { 0x00000001, gt215_ce_new },
 	.disp = gt215_disp_new,
 	.dma = nv50_dma_new,
 	.fifo = g84_fifo_new,
@@ -1193,7 +1193,7 @@ nva5_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, nv40_volt_new },
-	.ce[0] = gt215_ce_new,
+	.ce       = { 0x00000001, gt215_ce_new },
 	.disp = gt215_disp_new,
 	.dma = nv50_dma_new,
 	.fifo = g84_fifo_new,
@@ -1226,7 +1226,7 @@ nva8_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, nv40_volt_new },
-	.ce[0] = gt215_ce_new,
+	.ce       = { 0x00000001, gt215_ce_new },
 	.disp = gt215_disp_new,
 	.dma = nv50_dma_new,
 	.fifo = g84_fifo_new,
@@ -1323,7 +1323,7 @@ nvaf_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, nv40_volt_new },
-	.ce[0] = gt215_ce_new,
+	.ce       = { 0x00000001, gt215_ce_new },
 	.disp = mcp89_disp_new,
 	.dma = nv50_dma_new,
 	.fifo = g84_fifo_new,
@@ -1359,8 +1359,7 @@ nvc0_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
-	.ce[1] = gf100_ce_new,
+	.ce       = { 0x00000003, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1396,7 +1395,7 @@ nvc1_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
+	.ce       = { 0x00000001, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1432,7 +1431,7 @@ nvc3_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
+	.ce       = { 0x00000001, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1468,8 +1467,7 @@ nvc4_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
-	.ce[1] = gf100_ce_new,
+	.ce       = { 0x00000003, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1505,8 +1503,7 @@ nvc8_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
-	.ce[1] = gf100_ce_new,
+	.ce       = { 0x00000003, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1542,8 +1539,7 @@ nvce_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
-	.ce[1] = gf100_ce_new,
+	.ce       = { 0x00000003, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1579,7 +1575,7 @@ nvcf_chipset = {
 	.therm    = { 0x00000001, gt215_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
+	.ce       = { 0x00000001, gf100_ce_new },
 	.disp = gt215_disp_new,
 	.dma = gf100_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1614,7 +1610,7 @@ nvd7_chipset = {
 	.therm    = { 0x00000001, gf119_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf117_volt_new },
-	.ce[0] = gf100_ce_new,
+	.ce       = { 0x00000001, gf100_ce_new },
 	.disp = gf119_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1650,7 +1646,7 @@ nvd9_chipset = {
 	.therm    = { 0x00000001, gf119_therm_new },
 	.timer    = { 0x00000001, nv41_timer_new },
 	.volt     = { 0x00000001, gf100_volt_new },
-	.ce[0] = gf100_ce_new,
+	.ce       = { 0x00000001, gf100_ce_new },
 	.disp = gf119_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gf100_fifo_new,
@@ -1687,9 +1683,7 @@ nve4_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk104_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk104_fifo_new,
@@ -1726,9 +1720,7 @@ nve6_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk104_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk104_fifo_new,
@@ -1765,9 +1757,7 @@ nve7_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk104_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk104_fifo_new,
@@ -1796,7 +1786,7 @@ nvea_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk20a_volt_new },
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000004, gk104_ce_new },
 	.dma = gf119_dma_new,
 	.fifo = gk20a_fifo_new,
 	.gr = gk20a_gr_new,
@@ -1829,9 +1819,7 @@ nvf0_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk110_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk110_fifo_new,
@@ -1867,9 +1855,7 @@ nvf1_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk110_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk110_fifo_new,
@@ -1905,9 +1891,7 @@ nv106_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk110_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk208_fifo_new,
@@ -1943,9 +1927,7 @@ nv108_chipset = {
 	.timer    = { 0x00000001, nv41_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gk104_ce_new,
-	.ce[1] = gk104_ce_new,
-	.ce[2] = gk104_ce_new,
+	.ce       = { 0x00000007, gk104_ce_new },
 	.disp = gk110_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gk208_fifo_new,
@@ -1981,8 +1963,7 @@ nv117_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gm107_ce_new,
-	.ce[2] = gm107_ce_new,
+	.ce       = { 0x00000005, gm107_ce_new },
 	.disp = gm107_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gm107_fifo_new,
@@ -2017,8 +1998,7 @@ nv118_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gm107_ce_new,
-	.ce[2] = gm107_ce_new,
+	.ce       = { 0x00000005, gm107_ce_new },
 	.disp = gm107_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gm107_fifo_new,
@@ -2051,9 +2031,7 @@ nv120_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gm200_ce_new,
-	.ce[1] = gm200_ce_new,
-	.ce[2] = gm200_ce_new,
+	.ce       = { 0x00000007, gm200_ce_new },
 	.disp = gm200_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gm200_fifo_new,
@@ -2089,9 +2067,7 @@ nv124_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gm200_ce_new,
-	.ce[1] = gm200_ce_new,
-	.ce[2] = gm200_ce_new,
+	.ce       = { 0x00000007, gm200_ce_new },
 	.disp = gm200_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gm200_fifo_new,
@@ -2127,9 +2103,7 @@ nv126_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gk104_volt_new },
-	.ce[0] = gm200_ce_new,
-	.ce[1] = gm200_ce_new,
-	.ce[2] = gm200_ce_new,
+	.ce       = { 0x00000007, gm200_ce_new },
 	.disp = gm200_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gm200_fifo_new,
@@ -2157,7 +2131,7 @@ nv12b_chipset = {
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
 	.volt     = { 0x00000001, gm20b_volt_new },
-	.ce[2] = gm200_ce_new,
+	.ce       = { 0x00000004, gm200_ce_new },
 	.dma = gf119_dma_new,
 	.fifo = gm20b_fifo_new,
 	.gr = gm20b_gr_new,
@@ -2187,12 +2161,7 @@ nv130_chipset = {
 	.pmu      = { 0x00000001, gm200_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp100_ce_new,
-	.ce[1] = gp100_ce_new,
-	.ce[2] = gp100_ce_new,
-	.ce[3] = gp100_ce_new,
-	.ce[4] = gp100_ce_new,
-	.ce[5] = gp100_ce_new,
+	.ce       = { 0x0000003f, gp100_ce_new },
 	.dma = gf119_dma_new,
 	.disp = gp100_disp_new,
 	.fifo = gp100_fifo_new,
@@ -2227,10 +2196,7 @@ nv132_chipset = {
 	.pmu      = { 0x00000001, gp102_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp102_ce_new,
-	.ce[1] = gp102_ce_new,
-	.ce[2] = gp102_ce_new,
-	.ce[3] = gp102_ce_new,
+	.ce       = { 0x0000000f, gp102_ce_new },
 	.disp = gp102_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gp100_fifo_new,
@@ -2265,10 +2231,7 @@ nv134_chipset = {
 	.pmu      = { 0x00000001, gp102_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp102_ce_new,
-	.ce[1] = gp102_ce_new,
-	.ce[2] = gp102_ce_new,
-	.ce[3] = gp102_ce_new,
+	.ce       = { 0x0000000f, gp102_ce_new },
 	.disp = gp102_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gp100_fifo_new,
@@ -2303,10 +2266,7 @@ nv136_chipset = {
 	.pmu      = { 0x00000001, gp102_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp102_ce_new,
-	.ce[1] = gp102_ce_new,
-	.ce[2] = gp102_ce_new,
-	.ce[3] = gp102_ce_new,
+	.ce       = { 0x0000000f, gp102_ce_new },
 	.disp = gp102_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gp100_fifo_new,
@@ -2340,10 +2300,7 @@ nv137_chipset = {
 	.pmu      = { 0x00000001, gp102_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp102_ce_new,
-	.ce[1] = gp102_ce_new,
-	.ce[2] = gp102_ce_new,
-	.ce[3] = gp102_ce_new,
+	.ce       = { 0x0000000f, gp102_ce_new },
 	.disp = gp102_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gp100_fifo_new,
@@ -2378,10 +2335,7 @@ nv138_chipset = {
 	.pmu      = { 0x00000001, gp102_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp102_ce_new,
-	.ce[1] = gp102_ce_new,
-	.ce[2] = gp102_ce_new,
-	.ce[3] = gp102_ce_new,
+	.ce       = { 0x0000000f, gp102_ce_new },
 	.disp = gp102_disp_new,
 	.dma = gf119_dma_new,
 	.fifo = gp100_fifo_new,
@@ -2408,7 +2362,7 @@ nv13b_chipset = {
 	.pmu      = { 0x00000001, gp10b_pmu_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = gp100_ce_new,
+	.ce       = { 0x00000001, gp100_ce_new },
 	.dma = gf119_dma_new,
 	.fifo = gp10b_fifo_new,
 	.gr = gp10b_gr_new,
@@ -2439,16 +2393,8 @@ nv140_chipset = {
 	.therm    = { 0x00000001, gp100_therm_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
+	.ce       = { 0x000001ff, gv100_ce_new },
 	.disp = gv100_disp_new,
-	.ce[0] = gv100_ce_new,
-	.ce[1] = gv100_ce_new,
-	.ce[2] = gv100_ce_new,
-	.ce[3] = gv100_ce_new,
-	.ce[4] = gv100_ce_new,
-	.ce[5] = gv100_ce_new,
-	.ce[6] = gv100_ce_new,
-	.ce[7] = gv100_ce_new,
-	.ce[8] = gv100_ce_new,
 	.dma = gv100_dma_new,
 	.fifo = gv100_fifo_new,
 	.gr = gv100_gr_new,
@@ -2483,11 +2429,7 @@ nv162_chipset = {
 	.therm    = { 0x00000001, gp100_therm_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = tu102_ce_new,
-	.ce[1] = tu102_ce_new,
-	.ce[2] = tu102_ce_new,
-	.ce[3] = tu102_ce_new,
-	.ce[4] = tu102_ce_new,
+	.ce       = { 0x0000001f, tu102_ce_new },
 	.disp = tu102_disp_new,
 	.dma = gv100_dma_new,
 	.fifo = tu102_fifo_new,
@@ -2521,11 +2463,7 @@ nv164_chipset = {
 	.therm    = { 0x00000001, gp100_therm_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = tu102_ce_new,
-	.ce[1] = tu102_ce_new,
-	.ce[2] = tu102_ce_new,
-	.ce[3] = tu102_ce_new,
-	.ce[4] = tu102_ce_new,
+	.ce       = { 0x0000001f, tu102_ce_new },
 	.disp = tu102_disp_new,
 	.dma = gv100_dma_new,
 	.fifo = tu102_fifo_new,
@@ -2560,11 +2498,7 @@ nv166_chipset = {
 	.therm    = { 0x00000001, gp100_therm_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = tu102_ce_new,
-	.ce[1] = tu102_ce_new,
-	.ce[2] = tu102_ce_new,
-	.ce[3] = tu102_ce_new,
-	.ce[4] = tu102_ce_new,
+	.ce       = { 0x0000001f, tu102_ce_new },
 	.disp = tu102_disp_new,
 	.dma = gv100_dma_new,
 	.fifo = tu102_fifo_new,
@@ -2600,11 +2534,7 @@ nv167_chipset = {
 	.therm    = { 0x00000001, gp100_therm_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = tu102_ce_new,
-	.ce[1] = tu102_ce_new,
-	.ce[2] = tu102_ce_new,
-	.ce[3] = tu102_ce_new,
-	.ce[4] = tu102_ce_new,
+	.ce       = { 0x0000001f, tu102_ce_new },
 	.disp = tu102_disp_new,
 	.dma = gv100_dma_new,
 	.fifo = tu102_fifo_new,
@@ -2638,11 +2568,7 @@ nv168_chipset = {
 	.therm    = { 0x00000001, gp100_therm_new },
 	.timer    = { 0x00000001, gk20a_timer_new },
 	.top      = { 0x00000001, gk104_top_new },
-	.ce[0] = tu102_ce_new,
-	.ce[1] = tu102_ce_new,
-	.ce[2] = tu102_ce_new,
-	.ce[3] = tu102_ce_new,
-	.ce[4] = tu102_ce_new,
+	.ce       = { 0x0000001f, tu102_ce_new },
 	.disp = tu102_disp_new,
 	.dma = gv100_dma_new,
 	.fifo = tu102_fifo_new,
@@ -2938,7 +2864,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 	struct nvkm_subdev *subdev;
 	u64 mmio_base, mmio_size;
 	u32 boot0, boot1, strap;
-	int ret = -EEXIST, i;
+	int ret = -EEXIST, i, j;
 	unsigned chipset;
 
 	mutex_lock(&nv_devices_mutex);
@@ -3248,15 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-		_(NVKM_ENGINE_CE0     ,    ce[0]);
-		_(NVKM_ENGINE_CE1     ,    ce[1]);
-		_(NVKM_ENGINE_CE2     ,    ce[2]);
-		_(NVKM_ENGINE_CE3     ,    ce[3]);
-		_(NVKM_ENGINE_CE4     ,    ce[4]);
-		_(NVKM_ENGINE_CE5     ,    ce[5]);
-		_(NVKM_ENGINE_CE6     ,    ce[6]);
-		_(NVKM_ENGINE_CE7     ,    ce[7]);
-		_(NVKM_ENGINE_CE8     ,    ce[8]);
 		_(NVKM_ENGINE_CIPHER  ,   cipher);
 		_(NVKM_ENGINE_DISP    ,     disp);
 		_(NVKM_ENGINE_DMAOBJ  ,      dma);
@@ -3280,6 +3197,15 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 		_(NVKM_ENGINE_SEC2    ,     sec2);
 		_(NVKM_ENGINE_SW      ,       sw);
 		_(NVKM_ENGINE_VIC     ,      vic);
+		case NVKM_ENGINE_CE1:
+		case NVKM_ENGINE_CE2:
+		case NVKM_ENGINE_CE3:
+		case NVKM_ENGINE_CE4:
+		case NVKM_ENGINE_CE5:
+		case NVKM_ENGINE_CE6:
+		case NVKM_ENGINE_CE7:
+		case NVKM_ENGINE_CE8:
+			break;
 		default:
 			WARN_ON(1);
 			continue;