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authorPierre Moreau <pierre.morrow@free.fr>2015-10-03 21:35:16 +0200
committerBen Skeggs <bskeggs@redhat.com>2015-11-03 15:02:18 +1000
commit5d5b43f59bd214506265ea05a013229ff5291101 (patch)
tree48fc6b851325191454ab5404af6608e61aa3898f /drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c
parentdrm/nouveau/disp,pm: constify nvkm_object_func structures (diff)
downloadlinux-dev-5d5b43f59bd214506265ea05a013229ff5291101.tar.xz
linux-dev-5d5b43f59bd214506265ea05a013229ff5291101.zip
drm/nouveau/pci: Handle 5-bit and 8-bit tag field
If the hardware supports extended tag field (8-bit ones), then enable it. This is usually done by the VBIOS, but not on some MBPs (see fdo#86537). In case extended tag field is not supported, 5-bit tag field is used which limits the possible number of requests to 32. Apparently bits 7:0 of 0x08841c stores some number of outstanding requests, so cap it to 32 if extended tag is unsupported. Fixes: fdo#86537 v2: Restrict changes to chipsets >= 0x84 v3: * Add nvkm_pci_mask to pci.h * Mask bit 8 before setting it v4: * Rename `add` argument of nvkm_pci_mask to `value` * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset checks v5: * Rebase code on latest PCI structure * Restore PCIe check * Fix namings in nvkm_pci_mask * Rephrase part of the commit message Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c
index 8f3b00199d14..3faa6bfb895b 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c
@@ -25,8 +25,32 @@
#include <core/pci.h>
+void
+g84_pci_init(struct nvkm_pci *pci)
+{
+ /* The following only concerns PCIe cards. */
+ if (!pci_is_pcie(pci->pdev))
+ return;
+
+ /* Tag field is 8-bit long, regardless of EXT_TAG.
+ * However, if EXT_TAG is disabled, only the lower 5 bits of the tag
+ * field should be used, limiting the number of request to 32.
+ *
+ * Apparently, 0x041c stores some limit on the number of requests
+ * possible, so if EXT_TAG is disabled, limit that requests number to
+ * 32
+ *
+ * Fixes fdo#86537
+ */
+ if (nvkm_pci_rd32(pci, 0x007c) & 0x00000020)
+ nvkm_pci_mask(pci, 0x0080, 0x00000100, 0x00000100);
+ else
+ nvkm_pci_mask(pci, 0x041c, 0x00000060, 0x00000000);
+}
+
static const struct nvkm_pci_func
g84_pci_func = {
+ .init = g84_pci_init,
.rd32 = nv40_pci_rd32,
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,