drm/nouveau/therm: cosmetic changes

This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 31 insertions, 36 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c
index 85b5d0c18c0b..555722900bb3 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c
@@ -26,10 +26,6 @@
 
 #include <subdev/fuse.h>
 
-struct g84_therm_priv {
-	struct nvkm_therm_priv base;
-};
-
 int
 g84_temp_get(struct nvkm_therm *therm)
 {
@@ -55,13 +51,13 @@ g84_sensor_setup(struct nvkm_therm *therm)
 }
 
 static void
-g84_therm_program_alarms(struct nvkm_therm *therm)
+g84_therm_program_alarms(struct nvkm_therm *obj)
 {
-	struct nvkm_therm_priv *priv = (void *)therm;
-	struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
+	struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
+	struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
 	unsigned long flags;
 
-	spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
+	spin_lock_irqsave(&therm->sensor.alarm_program_lock, flags);
 
 	/* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */
 	nv_wr32(therm, 0x20000, 0x000003ff);
@@ -78,7 +74,7 @@ g84_therm_program_alarms(struct nvkm_therm *therm)
 
 	/* THRS_4 : down clock */
 	nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp);
-	spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
+	spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
 
 	nv_debug(therm,
 		 "Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
@@ -137,19 +133,18 @@ g84_therm_threshold_hyst_emulation(struct nvkm_therm *therm,
 static void
 g84_therm_intr(struct nvkm_subdev *subdev)
 {
-	struct nvkm_therm *therm = nvkm_therm(subdev);
-	struct nvkm_therm_priv *priv = (void *)therm;
-	struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
+	struct nvkm_therm_priv *therm = (void *)subdev;
+	struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
 	unsigned long flags;
 	uint32_t intr;
 
-	spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);
+	spin_lock_irqsave(&therm->sensor.alarm_program_lock, flags);
 
 	intr = nv_rd32(therm, 0x20100) & 0x3ff;
 
 	/* THRS_4: downclock */
 	if (intr & 0x002) {
-		g84_therm_threshold_hyst_emulation(therm, 0x20414, 24,
+		g84_therm_threshold_hyst_emulation(&therm->base, 0x20414, 24,
 						   &sensor->thrs_down_clock,
 						   NVKM_THERM_THRS_DOWNCLOCK);
 		intr &= ~0x002;
@@ -157,7 +152,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
 
 	/* shutdown */
 	if (intr & 0x004) {
-		g84_therm_threshold_hyst_emulation(therm, 0x20480, 20,
+		g84_therm_threshold_hyst_emulation(&therm->base, 0x20480, 20,
 						   &sensor->thrs_shutdown,
 						   NVKM_THERM_THRS_SHUTDOWN);
 		intr &= ~0x004;
@@ -165,7 +160,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
 
 	/* THRS_1 : fan boost */
 	if (intr & 0x008) {
-		g84_therm_threshold_hyst_emulation(therm, 0x204c4, 21,
+		g84_therm_threshold_hyst_emulation(&therm->base, 0x204c4, 21,
 						   &sensor->thrs_fan_boost,
 						   NVKM_THERM_THRS_FANBOOST);
 		intr &= ~0x008;
@@ -173,7 +168,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
 
 	/* THRS_2 : critical */
 	if (intr & 0x010) {
-		g84_therm_threshold_hyst_emulation(therm, 0x204c0, 22,
+		g84_therm_threshold_hyst_emulation(&therm->base, 0x204c0, 22,
 						   &sensor->thrs_critical,
 						   NVKM_THERM_THRS_CRITICAL);
 		intr &= ~0x010;
@@ -186,20 +181,20 @@ g84_therm_intr(struct nvkm_subdev *subdev)
 	nv_wr32(therm, 0x20100, 0xffffffff);
 	nv_wr32(therm, 0x1100, 0x10000); /* PBUS */
 
-	spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
+	spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
 }
 
 static int
 g84_therm_init(struct nvkm_object *object)
 {
-	struct g84_therm_priv *priv = (void *)object;
+	struct nvkm_therm_priv *therm = (void *)object;
 	int ret;
 
-	ret = nvkm_therm_init(&priv->base.base);
+	ret = nvkm_therm_init(&therm->base);
 	if (ret)
 		return ret;
 
-	g84_sensor_setup(&priv->base.base);
+	g84_sensor_setup(&therm->base);
 	return 0;
 }
 
@@ -208,37 +203,37 @@ g84_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 	       struct nvkm_oclass *oclass, void *data, u32 size,
 	       struct nvkm_object **pobject)
 {
-	struct g84_therm_priv *priv;
+	struct nvkm_therm_priv *therm;
 	int ret;
 
-	ret = nvkm_therm_create(parent, engine, oclass, &priv);
-	*pobject = nv_object(priv);
+	ret = nvkm_therm_create(parent, engine, oclass, &therm);
+	*pobject = nv_object(therm);
 	if (ret)
 		return ret;
 
-	priv->base.base.pwm_ctrl = nv50_fan_pwm_ctrl;
-	priv->base.base.pwm_get = nv50_fan_pwm_get;
-	priv->base.base.pwm_set = nv50_fan_pwm_set;
-	priv->base.base.pwm_clock = nv50_fan_pwm_clock;
-	priv->base.base.temp_get = g84_temp_get;
-	priv->base.sensor.program_alarms = g84_therm_program_alarms;
-	nv_subdev(priv)->intr = g84_therm_intr;
+	therm->base.pwm_ctrl = nv50_fan_pwm_ctrl;
+	therm->base.pwm_get = nv50_fan_pwm_get;
+	therm->base.pwm_set = nv50_fan_pwm_set;
+	therm->base.pwm_clock = nv50_fan_pwm_clock;
+	therm->base.temp_get = g84_temp_get;
+	therm->sensor.program_alarms = g84_therm_program_alarms;
+	nv_subdev(therm)->intr = g84_therm_intr;
 
 	/* init the thresholds */
-	nvkm_therm_sensor_set_threshold_state(&priv->base.base,
+	nvkm_therm_sensor_set_threshold_state(&therm->base,
 					      NVKM_THERM_THRS_SHUTDOWN,
 					      NVKM_THERM_THRS_LOWER);
-	nvkm_therm_sensor_set_threshold_state(&priv->base.base,
+	nvkm_therm_sensor_set_threshold_state(&therm->base,
 					      NVKM_THERM_THRS_FANBOOST,
 					      NVKM_THERM_THRS_LOWER);
-	nvkm_therm_sensor_set_threshold_state(&priv->base.base,
+	nvkm_therm_sensor_set_threshold_state(&therm->base,
 					      NVKM_THERM_THRS_CRITICAL,
 					      NVKM_THERM_THRS_LOWER);
-	nvkm_therm_sensor_set_threshold_state(&priv->base.base,
+	nvkm_therm_sensor_set_threshold_state(&therm->base,
 					      NVKM_THERM_THRS_DOWNCLOCK,
 					      NVKM_THERM_THRS_LOWER);
 
-	return nvkm_therm_preinit(&priv->base.base);
+	return nvkm_therm_preinit(&therm->base);
 }
 
 int