diff options
author | Christian König <christian.koenig@amd.com> | 2020-09-30 16:44:16 +0200 |
---|---|---|
committer | Christian König <christian.koenig@amd.com> | 2020-10-15 12:51:35 +0200 |
commit | ce65b874001d756294e0b7cf06c51137af964f38 (patch) | |
tree | 609d12c729903bc175c665ce3cd39ef9b690c234 /drivers/gpu/drm/nouveau | |
parent | drm/ttm: use caching instead of placement for ttm_io_prot (diff) | |
download | linux-dev-ce65b874001d756294e0b7cf06c51137af964f38.tar.xz linux-dev-ce65b874001d756294e0b7cf06c51137af964f38.zip |
drm/ttm: nuke caching placement flags
Changing the caching on the fly never really worked
flawlessly.
So stop this completely and just let drivers specific the
desired caching in the tt or bus object.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://patchwork.freedesktop.org/patch/394256/
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bo.c | 36 |
1 files changed, 9 insertions, 27 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index cb878c0e8276..4ccb3329014b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -343,37 +343,23 @@ nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align, } static void -set_placement_list(struct nouveau_drm *drm, struct ttm_place *pl, unsigned *n, - uint32_t domain, uint32_t flags) +set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain) { *n = 0; if (domain & NOUVEAU_GEM_DOMAIN_VRAM) { - struct nvif_mmu *mmu = &drm->client.mmu; - const u8 type = mmu->type[drm->ttm.type_vram].type; - pl[*n].mem_type = TTM_PL_VRAM; - pl[*n].flags = flags & ~TTM_PL_FLAG_CACHED; - - /* Some BARs do not support being ioremapped WC */ - if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA && - type & NVIF_MEM_UNCACHED) - pl[*n].flags &= ~TTM_PL_FLAG_WC; - + pl[*n].flags = 0; (*n)++; } if (domain & NOUVEAU_GEM_DOMAIN_GART) { pl[*n].mem_type = TTM_PL_TT; - pl[*n].flags = flags; - - if (drm->agp.bridge) - pl[*n].flags &= ~TTM_PL_FLAG_CACHED; - + pl[*n].flags = 0; (*n)++; } if (domain & NOUVEAU_GEM_DOMAIN_CPU) { pl[*n].mem_type = TTM_PL_SYSTEM; - pl[(*n)++].flags = flags; + pl[(*n)++].flags = 0; } } @@ -415,18 +401,14 @@ void nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain, uint32_t busy) { - struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); struct ttm_placement *pl = &nvbo->placement; - uint32_t flags = nvbo->force_coherent ? TTM_PL_FLAG_UNCACHED : - TTM_PL_MASK_CACHING; pl->placement = nvbo->placements; - set_placement_list(drm, nvbo->placements, &pl->num_placement, - domain, flags); + set_placement_list(nvbo->placements, &pl->num_placement, domain); pl->busy_placement = nvbo->busy_placements; - set_placement_list(drm, nvbo->busy_placements, &pl->num_busy_placement, - domain | busy, flags); + set_placement_list(nvbo->busy_placements, &pl->num_busy_placement, + domain | busy); set_placement_range(nvbo, domain); } @@ -888,7 +870,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, .fpfn = 0, .lpfn = 0, .mem_type = TTM_PL_TT, - .flags = TTM_PL_MASK_CACHING + .flags = 0 }; struct ttm_placement placement; struct ttm_resource tmp_reg; @@ -930,7 +912,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, .fpfn = 0, .lpfn = 0, .mem_type = TTM_PL_TT, - .flags = TTM_PL_MASK_CACHING + .flags = 0 }; struct ttm_placement placement; struct ttm_resource tmp_reg; |