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| author |   Jyri Sarha <jsarha@ti.com> | 2016-06-07 15:09:15 +0300 |
|---|---|---|
| committer |   Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-06-07 17:10:49 +0300 |
| commit | acc3a231d3d145b23d1f975b9be89b7cfb09885b (patch) | |
| tree | 0c8ff7ff364413e528a1ffb4cdf08263aacd7576 /drivers/gpu/drm/omapdrm/dss/dispc.h | |
| parent | drm: drm_helper_crtc_enable_color_mgmt() => drm_crtc_enable_color_mgmt() (diff) | |
| download | linux-dev-acc3a231d3d145b23d1f975b9be89b7cfb09885b.tar.xz linux-dev-acc3a231d3d145b23d1f975b9be89b7cfb09885b.zip | |
drm/omapdrm: Add gamma table support to DSS dispc
Add gamma table support to DSS dispc.
DSS driver initializes the default gamma table at component bind time
and holds a copy of all gamma tables in its internal data structure.
Each call to dispc_mgr_set_gamma() updates the internal table and
triggers write to the HW, if it is enabled. The tables are restored to
HW in PM resume callback. The drivers internal data structure match
the HW tables in size and in number of significant bits per color
component. The dispc_mgr_set_gamma() converts the size of any given
table for the internal data structure using linear interpolation.
Default gamma table is restored if NULL is given in place of gamma
lut.
dispc_mgr_gamma_size() gives HW gamma table size for the channel and
returns 0 if gamma table is not supported by the HW or the DSS driver.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/dispc.h')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/dss/dispc.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.h b/drivers/gpu/drm/omapdrm/dss/dispc.h index 483744223dd1..bc1d8126ee87 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.h +++ b/drivers/gpu/drm/omapdrm/dss/dispc.h @@ -42,6 +42,11 @@ #define DISPC_MSTANDBY_CTRL 0x0858 #define DISPC_GLOBAL_MFLAG_ATTRIBUTE 0x085C +#define DISPC_GAMMA_TABLE0 0x0630 +#define DISPC_GAMMA_TABLE1 0x0634 +#define DISPC_GAMMA_TABLE2 0x0638 +#define DISPC_GAMMA_TABLE3 0x0850 + /* DISPC overlay registers */ #define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \ DISPC_BA0_OFFSET(n)) |