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| author |   Alex Deucher <alexdeucher@gmail.com> | 2009-12-28 13:58:44 -0500 |
|---|---|---|
| committer |   Dave Airlie <airlied@redhat.com> | 2010-02-09 09:32:27 +1000 |
| commit | 56278a8edacee9ae9e3bc9d8c8e2d37e9969f3eb (patch) | |
| tree | 2aea5e4707e5caffb30abacc78230bd6f7295c32 /drivers/gpu/drm/radeon/radeon_pm.c | |
| parent | drm/radeon/kms: add functions to get current pcie lanes (diff) | |
| download | linux-dev-56278a8edacee9ae9e3bc9d8c8e2d37e9969f3eb.tar.xz linux-dev-56278a8edacee9ae9e3bc9d8c8e2d37e9969f3eb.zip | |
drm/radeon/kms: pull power mode info from bios tables (v3)
The general idea is to validate the current hw state
against the set of power states and select a power
state based on that. This patch just pulls the power
states from the bios and prints the information. It
is not currently hooked up in the actual power management
code. Hooking it up will require reworking the the current
power state selection code and will be handled in a future
patch.
Additionally, we'd need to decide on some default lower
power states for cards without power tables.
v2 - increment state_index after checking for default state
v3 - fix typo in pm init on pre-atom cards, handle pre-atom
cards without x86 bioses
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_pm.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index a9c61f435c06..6eb0e0b3264b 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c @@ -18,6 +18,7 @@ * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Rafał Miłecki <zajec5@gmail.com> + * Alex Deucher <alexdeucher@gmail.com> */ #include "drmP.h" #include "radeon.h" @@ -39,6 +40,35 @@ static const char *pm_state_names[4] = { "PM_STATE_ACTIVE" }; +static void radeon_print_power_mode_info(struct radeon_device *rdev) +{ + int i, j; + bool is_default; + + DRM_INFO("%d Power State(s)\n", rdev->pm.num_power_states); + for (i = 0; i < rdev->pm.num_power_states; i++) { + if (rdev->pm.default_power_state == &rdev->pm.power_state[i]) + is_default = true; + else + is_default = false; + DRM_INFO("State %d %s\n", i, is_default ? "(default)" : ""); + if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) + DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].non_clock_info.pcie_lanes); + DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes); + for (j = 0; j < rdev->pm.power_state[i].num_clock_modes; j++) { + if (rdev->flags & RADEON_IS_IGP) + DRM_INFO("\t\t%d engine: %d\n", + j, + rdev->pm.power_state[i].clock_info[j].sclk * 10); + else + DRM_INFO("\t\t%d engine/memory: %d/%d\n", + j, + rdev->pm.power_state[i].clock_info[j].sclk * 10, + rdev->pm.power_state[i].clock_info[j].mclk * 10); + } + } +} + int radeon_pm_init(struct radeon_device *rdev) { rdev->pm.state = PM_STATE_DISABLED; @@ -46,6 +76,14 @@ int radeon_pm_init(struct radeon_device *rdev) rdev->pm.downclocked = false; rdev->pm.vblank_callback = false; + if (rdev->bios) { + if (rdev->is_atom_bios) + radeon_atombios_get_power_modes(rdev); + else + radeon_combios_get_power_modes(rdev); + radeon_print_power_mode_info(rdev); + } + radeon_pm_check_limits(rdev); if (radeon_debugfs_pm_init(rdev)) { |