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| author |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-01-12 23:07:46 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-01-12 23:07:46 +0100 |
| commit | 0a87a2db485a1456b7427914969c0e8195a1bbda (patch) | |
| tree | 8d0186672af22c6ee76118c471881cd66a36502d /drivers/gpu/drm/radeon/si_dpm.c | |
| parent | drm/i915: Reserve shadow batch VMA analogue to others (diff) | |
| parent | drm/i915: remove unused power_well/get_cdclk_freq api (diff) | |
| download | linux-dev-0a87a2db485a1456b7427914969c0e8195a1bbda.tar.xz linux-dev-0a87a2db485a1456b7427914969c0e8195a1bbda.zip | |
Merge tag 'topic/i915-hda-componentized-2015-01-12' into drm-intel-next-queued
Conflicts:
drivers/gpu/drm/i915/intel_runtime_pm.c
Separate branch so that Takashi can also pull just this refactoring
into sound-next.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index cf4c420b5572..32e354b8b0ab 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -5893,7 +5893,7 @@ static void si_fan_ctrl_set_static_mode(struct radeon_device *rdev, u32 mode) tmp |= TMIN(0); WREG32(CG_FDO_CTRL2, tmp); - tmp = RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK; + tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK; tmp |= FDO_PWM_MODE(mode); WREG32(CG_FDO_CTRL2, tmp); } @@ -6098,7 +6098,7 @@ static int si_fan_ctrl_set_fan_speed_rpm(struct radeon_device *rdev, tmp |= TARGET_PERIOD(tach_period); WREG32(CG_TACH_CTRL, tmp); - si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC); + si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC_RPM); return 0; } @@ -6114,7 +6114,7 @@ static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev) tmp |= FDO_PWM_MODE(si_pi->fan_ctrl_default_mode); WREG32(CG_FDO_CTRL2, tmp); - tmp = RREG32(CG_FDO_CTRL2) & TMIN_MASK; + tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK; tmp |= TMIN(si_pi->t_min); WREG32(CG_FDO_CTRL2, tmp); si_pi->fan_ctrl_is_in_default_mode = true; |