aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
diff options
context:
space:
mode:
authorJagan Teki <jagan@amarulasolutions.com>2019-12-22 18:52:26 +0530
committerMaxime Ripard <maxime@cerno.tech>2019-12-26 10:36:31 +0100
commit66dbdc7c61627a3d3b50017a1d202dc637a10f53 (patch)
tree7bb2b90ac15512c095351a18c87a40ae430f3a85 /drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
parentdrm/sun4i: dsi: Get the mod clock for A31 (diff)
downloadlinux-dev-66dbdc7c61627a3d3b50017a1d202dc637a10f53.tar.xz
linux-dev-66dbdc7c61627a3d3b50017a1d202dc637a10f53.zip
drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk
regmap has special API to enable the controller bus clock while initializing register space, and current driver is using devm_regmap_init_mmio_clk which require to specify bus clk_id argument as "bus" But, the usage of clocks are varies between different Allwinner DSI controllers. Clocking in A33 would need bus and mod clocks where as A64 would need only bus clock. Since A64 support only single bus clock, it is optional to specify the clock-names on the controller device tree node. So using NULL on clk_id would get the attached clock. To support clk_id as "bus" and "NULL" during clock enablement between controllers, this patch add generic code to handle the bus clock using regmap_mmio_attach_clk with associated regmap APIs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20191222132229.30276-5-jagan@amarulasolutions.com
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c')
-rw-r--r--drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c37
1 files changed, 29 insertions, 8 deletions
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index 9bb3222c95b9..cdfec03bf1a4 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1081,6 +1081,7 @@ static const struct component_ops sun6i_dsi_ops = {
static int sun6i_dsi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ const char *bus_clk_name = NULL;
struct sun6i_dsi *dsi;
struct resource *res;
void __iomem *base;
@@ -1094,6 +1095,10 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
dsi->host.ops = &sun6i_dsi_host_ops;
dsi->host.dev = dev;
+ if (of_device_is_compatible(dev->of_node,
+ "allwinner,sun6i-a31-mipi-dsi"))
+ bus_clk_name = "bus";
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
if (IS_ERR(base)) {
@@ -1107,25 +1112,35 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->regulator);
}
- dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base,
- &sun6i_dsi_regmap_config);
- if (IS_ERR(dsi->regs)) {
- dev_err(dev, "Couldn't create the DSI encoder regmap\n");
- return PTR_ERR(dsi->regs);
- }
-
dsi->reset = devm_reset_control_get_shared(dev, NULL);
if (IS_ERR(dsi->reset)) {
dev_err(dev, "Couldn't get our reset line\n");
return PTR_ERR(dsi->reset);
}
+ dsi->regs = devm_regmap_init_mmio(dev, base, &sun6i_dsi_regmap_config);
+ if (IS_ERR(dsi->regs)) {
+ dev_err(dev, "Couldn't init regmap\n");
+ return PTR_ERR(dsi->regs);
+ }
+
+ dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
+ if (IS_ERR(dsi->bus_clk)) {
+ dev_err(dev, "Couldn't get the DSI bus clock\n");
+ return PTR_ERR(dsi->bus_clk);
+ }
+
+ ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
+ if (ret)
+ return ret;
+
if (of_device_is_compatible(dev->of_node,
"allwinner,sun6i-a31-mipi-dsi")) {
dsi->mod_clk = devm_clk_get(dev, "mod");
if (IS_ERR(dsi->mod_clk)) {
dev_err(dev, "Couldn't get the DSI mod clock\n");
- return PTR_ERR(dsi->mod_clk);
+ ret = PTR_ERR(dsi->mod_clk);
+ goto err_attach_clk;
}
}
@@ -1164,6 +1179,9 @@ err_pm_disable:
pm_runtime_disable(dev);
err_unprotect_clk:
clk_rate_exclusive_put(dsi->mod_clk);
+err_attach_clk:
+ if (!IS_ERR(dsi->bus_clk))
+ regmap_mmio_detach_clk(dsi->regs);
return ret;
}
@@ -1177,6 +1195,9 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
pm_runtime_disable(dev);
clk_rate_exclusive_put(dsi->mod_clk);
+ if (!IS_ERR(dsi->bus_clk))
+ regmap_mmio_detach_clk(dsi->regs);
+
return 0;
}