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| author |   Thierry Reding <treding@nvidia.com> | 2014-07-07 15:32:53 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-11-13 16:11:59 +0100 |
| commit | 9c0127004ff4e891e475d6dfb22ddcbaeca6ec9b (patch) | |
| tree | 5e9f76155677e00934fe3b990d753d1a29549728 /drivers/gpu/drm/tegra/drm.h | |
| parent | gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register (diff) | |
| download | linux-dev-9c0127004ff4e891e475d6dfb22ddcbaeca6ec9b.tar.xz linux-dev-9c0127004ff4e891e475d6dfb22ddcbaeca6ec9b.zip | |
drm/tegra: dc: Add powergate support
Both display controllers are in their own power partition. Currently the
driver relies on the assumption that these partitions are on (which is
the hardware default). However some bootloaders may disable them, so the
driver must make sure to turn them back on to avoid hangs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/drm.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/drm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h index e89c70fa82d5..b994c017971d 100644 --- a/drivers/gpu/drm/tegra/drm.h +++ b/drivers/gpu/drm/tegra/drm.h @@ -101,6 +101,7 @@ struct tegra_dc { spinlock_t lock; struct drm_crtc base; + int powergate; int pipe; struct clk *clk; |