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authorThierry Reding <treding@nvidia.com>2014-11-13 14:34:50 +0100
committerThierry Reding <treding@nvidia.com>2014-11-13 16:12:13 +0100
commit41a8e72e0e32eca7acbcf11d4c75cf5d21d0c825 (patch)
tree6249cbdc72bc1b7a75c9ce54ab9856d1fa3a9f02 /drivers/gpu/drm/tegra/dsi.c
parentdrm/tegra: dsi: Do not manage clock on enable/disable (diff)
downloadlinux-dev-41a8e72e0e32eca7acbcf11d4c75cf5d21d0c825.tar.xz
linux-dev-41a8e72e0e32eca7acbcf11d4c75cf5d21d0c825.zip
drm/tegra: dsi: Leave parent clock alone
The common clock framework will take care of preparing and enabling the parent of the DSI clock automatically. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dsi.c')
-rw-r--r--drivers/gpu/drm/tegra/dsi.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index c62f68071ade..e817ee11f0ec 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -886,12 +886,6 @@ static int tegra_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->clk_parent);
}
- err = clk_prepare_enable(dsi->clk_parent);
- if (err < 0) {
- dev_err(&pdev->dev, "cannot enable parent clock\n");
- return err;
- }
-
dsi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi");
if (IS_ERR(dsi->vdd)) {
dev_err(&pdev->dev, "cannot get VDD supply\n");
@@ -966,7 +960,6 @@ static int tegra_dsi_remove(struct platform_device *pdev)
tegra_mipi_free(dsi->mipi);
regulator_disable(dsi->vdd);
- clk_disable_unprepare(dsi->clk_parent);
clk_disable_unprepare(dsi->clk_lp);
clk_disable_unprepare(dsi->clk);
reset_control_assert(dsi->rst);