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| author |   Thierry Reding <treding@nvidia.com> | 2014-03-13 08:50:39 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-06-05 23:09:26 +0200 |
| commit | f7d6889b79aa93c0dde8e30d3e0f2f9acf0812b2 (patch) | |
| tree | cce8102bb326312cfa6f8fe5a98dc9e453a974e0 /drivers/gpu/drm/tegra/dsi.h | |
| parent | drm/tegra: hdmi - Fix disable sequence (diff) | |
| download | linux-dev-f7d6889b79aa93c0dde8e30d3e0f2f9acf0812b2.tar.xz linux-dev-f7d6889b79aa93c0dde8e30d3e0f2f9acf0812b2.zip | |
drm/tegra: dsi - Use internal pixel format
The pixel format enumeration values used by the Tegra DSI controller
don't match those defined by the DSI framework. Make sure to convert
them to the internal format before writing it to the register.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dsi.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/dsi.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dsi.h b/drivers/gpu/drm/tegra/dsi.h index 1db5cc24ea91..5ce610d08d77 100644 --- a/drivers/gpu/drm/tegra/dsi.h +++ b/drivers/gpu/drm/tegra/dsi.h @@ -117,4 +117,14 @@ #define DSI_INIT_SEQ_DATA_14 0x5e #define DSI_INIT_SEQ_DATA_15 0x5f +/* + * pixel format as used in the DSI_CONTROL_FORMAT field + */ +enum tegra_dsi_format { + TEGRA_DSI_FORMAT_16P, + TEGRA_DSI_FORMAT_18NP, + TEGRA_DSI_FORMAT_18P, + TEGRA_DSI_FORMAT_24P, +}; + #endif |