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| author |   Thierry Reding <treding@nvidia.com> | 2015-04-27 14:48:35 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-08-13 13:47:43 +0200 |
| commit | 8fd3ffa902a0d9f282ffa80599970ff1c823b1a8 (patch) | |
| tree | a116aa9be3741bcbe07fbf6f0eefd3f8c137303e /drivers/gpu/drm/tegra/hdmi.c | |
| parent | drm/tegra: dc: Record statistics (diff) | |
| download | linux-dev-8fd3ffa902a0d9f282ffa80599970ff1c823b1a8.tar.xz linux-dev-8fd3ffa902a0d9f282ffa80599970ff1c823b1a8.zip | |
drm/tegra: dc: Rename register for consistency
The horizontal pulse enable bits are named H_PULSE{0,1,2}_ENABLE in the
TRM. Modify the driver to use the same naming for consistency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/hdmi.c')
| -rw-r--r-- | drivers/gpu/drm/tegra/hdmi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c index 06ab1783bba1..58f0cff65ff8 100644 --- a/drivers/gpu/drm/tegra/hdmi.c +++ b/drivers/gpu/drm/tegra/hdmi.c @@ -878,7 +878,7 @@ static void tegra_hdmi_encoder_mode_set(struct drm_encoder *encoder, /* video_preamble uses h_pulse2 */ pulse_start = 1 + h_sync_width + h_back_porch - 10; - tegra_dc_writel(dc, H_PULSE_2_ENABLE, DC_DISP_DISP_SIGNAL_OPTIONS0); + tegra_dc_writel(dc, H_PULSE2_ENABLE, DC_DISP_DISP_SIGNAL_OPTIONS0); value = PULSE_MODE_NORMAL | PULSE_POLARITY_HIGH | PULSE_QUAL_VACTIVE | PULSE_LAST_END_A; |