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authorDmitry Osipenko <digetx@gmail.com>2017-06-15 02:18:29 +0300
committerThierry Reding <treding@nvidia.com>2017-06-15 14:19:23 +0200
commit6ac1571b4c60cb73a1f174b15ea93f7e38d74a88 (patch)
treee2040c6f2aa698e42b5521ca129bc0083c925a39 /drivers/gpu/drm/tegra
parentdrm/tegra: Check syncpoint ID in the 'submit' IOCTL (diff)
downloadlinux-dev-6ac1571b4c60cb73a1f174b15ea93f7e38d74a88.tar.xz
linux-dev-6ac1571b4c60cb73a1f174b15ea93f7e38d74a88.zip
drm/tegra: dc: Avoid reset asserts on Tegra20
Commit 33a8eb8d40ee ("drm/tegra: dc: Implement runtime PM") introduced HW reset control. It causes a hang on Tegra20 if both display controllers are utilized (RGB panel and HDMI). The TRM suggests that each display controller has its own reset control, apparently it is not correct. Fixes: 33a8eb8d40ee ("drm/tegra: dc: Implement runtime PM") Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra')
-rw-r--r--drivers/gpu/drm/tegra/dc.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 95b373f739f2..98ee6abb056c 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -30,6 +30,7 @@ struct tegra_dc_soc_info {
bool supports_block_linear;
unsigned int pitch_align;
bool has_powergate;
+ bool broken_reset;
};
struct tegra_plane {
@@ -1856,6 +1857,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
.supports_block_linear = false,
.pitch_align = 8,
.has_powergate = false,
+ .broken_reset = true,
};
static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
@@ -1865,6 +1867,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
.supports_block_linear = false,
.pitch_align = 8,
.has_powergate = false,
+ .broken_reset = false,
};
static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
@@ -1874,6 +1877,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
.supports_block_linear = false,
.pitch_align = 64,
.has_powergate = true,
+ .broken_reset = false,
};
static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
@@ -1883,6 +1887,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
.supports_block_linear = true,
.pitch_align = 64,
.has_powergate = true,
+ .broken_reset = false,
};
static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
@@ -1892,6 +1897,7 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
.supports_block_linear = true,
.pitch_align = 64,
.has_powergate = true,
+ .broken_reset = false,
};
static const struct of_device_id tegra_dc_of_match[] = {
@@ -1989,7 +1995,8 @@ static int tegra_dc_probe(struct platform_device *pdev)
return PTR_ERR(dc->rst);
}
- reset_control_assert(dc->rst);
+ if (!dc->soc->broken_reset)
+ reset_control_assert(dc->rst);
if (dc->soc->has_powergate) {
if (dc->pipe == 0)
@@ -2063,10 +2070,12 @@ static int tegra_dc_suspend(struct device *dev)
struct tegra_dc *dc = dev_get_drvdata(dev);
int err;
- err = reset_control_assert(dc->rst);
- if (err < 0) {
- dev_err(dev, "failed to assert reset: %d\n", err);
- return err;
+ if (!dc->soc->broken_reset) {
+ err = reset_control_assert(dc->rst);
+ if (err < 0) {
+ dev_err(dev, "failed to assert reset: %d\n", err);
+ return err;
+ }
}
if (dc->soc->has_powergate)
@@ -2096,10 +2105,13 @@ static int tegra_dc_resume(struct device *dev)
return err;
}
- err = reset_control_deassert(dc->rst);
- if (err < 0) {
- dev_err(dev, "failed to deassert reset: %d\n", err);
- return err;
+ if (!dc->soc->broken_reset) {
+ err = reset_control_deassert(dc->rst);
+ if (err < 0) {
+ dev_err(dev,
+ "failed to deassert reset: %d\n", err);
+ return err;
+ }
}
}