diff options
| author |   Daniel Schultz <d.schultz@phytec.de> | 2016-10-28 13:52:41 +0200 |
|---|---|---|
| committer |   Jyri Sarha <jsarha@ti.com> | 2016-11-29 21:03:17 +0200 |
| commit | 4c268d635f8d4f5ac438884e781a2ebd5754c491 (patch) | |
| tree | ae226b428b4a3f273726a761f2ab0794173a5bf8 /drivers/gpu/drm/tilcdc | |
| parent | drm/tilcdc: add a da850-specific compatible string (diff) | |
| download | linux-dev-4c268d635f8d4f5ac438884e781a2ebd5754c491.tar.xz linux-dev-4c268d635f8d4f5ac438884e781a2ebd5754c491.zip | |
drm/tilcdc: Add revision handling for FB_CEILING
The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address")
added an adjustment of the FB_CEILING address. This is done by decrementing
the address by one.
On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the
display border, because the ceiling address is 8f276fff instead of
8f277000. Since this adjustment isn't necessary for the LCDC v2, the
origin ceiling address should be used.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Diffstat (limited to 'drivers/gpu/drm/tilcdc')
| -rw-r--r-- | drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index db2f538f10ae..06e8240d5ff8 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -71,6 +71,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; struct drm_gem_cma_object *gem; dma_addr_t start, end; u64 dma_base_and_ceiling; @@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) * unlikely that LCDC would fetch the DMA addresses in the middle of * an update. */ - dma_base_and_ceiling = (u64)(end - 1) << 32 | start; + if (priv->rev == 1) + end -= 1; + + dma_base_and_ceiling = (u64)end << 32 | start; tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling); if (tilcdc_crtc->curr_fb) |