diff options
| author |   Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-02-13 17:07:19 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-02-14 17:03:42 +0800 |
| commit | 03806edc3582392727a6dc617662ac57e6b24b01 (patch) | |
| tree | cb1350a119e10d21776eb31b9424db4acc1877b9 /drivers/gpu/drm | |
| parent | drm/i915/gvt: Fix alignment for GTT allocation (diff) | |
| download | linux-dev-03806edc3582392727a6dc617662ac57e6b24b01.tar.xz linux-dev-03806edc3582392727a6dc617662ac57e6b24b01.zip | |
drm/i915/gvt: Fix shadow context descriptor
We need to be careful to only update addr mode for gvt shadow context
descriptor but keep other valid config. This fixes GPU hang caused by
invalid descriptor submitted for gvt workload.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/scheduler.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 3fbcd9db65b9..d6b6d0efdd1a 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -169,7 +169,8 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) gvt_dbg_sched("ring id %d prepare to dispatch workload %p\n", ring_id, workload); - shadow_ctx->desc_template = workload->ctx_desc.addressing_mode << + shadow_ctx->desc_template &= ~(0x3 << GEN8_CTX_ADDRESSING_MODE_SHIFT); + shadow_ctx->desc_template |= workload->ctx_desc.addressing_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT; mutex_lock(&dev_priv->drm.struct_mutex); |