diff options
| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2009-10-14 20:12:46 +0100 |
|---|---|---|
| committer |   Eric Anholt <eric@anholt.net> | 2009-10-15 09:20:58 -0700 |
| commit | 0d9c778978ff268228c095ae737c282c03a5986d (patch) | |
| tree | e20e4c63530b8b25cd582cf3602fa2da143003a8 /drivers/gpu/drm | |
| parent | drm/i915: save/restore BLC histogram control reg across suspend/resume (diff) | |
| download | linux-dev-0d9c778978ff268228c095ae737c282c03a5986d.tar.xz linux-dev-0d9c778978ff268228c095ae737c282c03a5986d.zip | |
drm/i915: Install a fence register for fbc on g4x
To enable framebuffer compression on a g4x, we not only need the buffer
to tiled (X only), we also need to hold a fence register for the buffer.
Currently we only install a fence register for pre-i965s when setting up
the scanout buffer. Rather than adding some convoluted logic to
g4x_enable_fbc() to acquire a fence register, and perhaps to
g4x_disable_fbc() to release it again, we can extend the acquisition
during setup to all chipsets.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8278d9d163ad..123cce1ae470 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1260,9 +1260,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, return ret; } - /* Pre-i965 needs to install a fence for tiled scan-out */ - if (!IS_I965G(dev) && - obj_priv->fence_reg == I915_FENCE_REG_NONE && + /* Install a fence for tiled scan-out. Pre-i965 always needs a fence, + * whereas 965+ only requires a fence if using framebuffer compression. + * For simplicity, we always install a fence as the cost is not that onerous. + */ + if (obj_priv->fence_reg == I915_FENCE_REG_NONE && obj_priv->tiling_mode != I915_TILING_NONE) { ret = i915_gem_object_get_fence_reg(obj); if (ret != 0) { |