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authorJani Nikula <jani.nikula@intel.com>2021-12-09 18:51:24 +0200
committerJani Nikula <jani.nikula@intel.com>2021-12-13 12:28:04 +0200
commit2bebea57c2efeb7c4e981f5ff76bdca7e58ab815 (patch)
treec3fc06ad322021ecd0f091887687b6620afeb5e1 /drivers/gpu/drm
parentdrm/i915/cdclk: move intel_atomic_check_cdclk() to intel_cdclk.c (diff)
downloadlinux-dev-2bebea57c2efeb7c4e981f5ff76bdca7e58ab815.tar.xz
linux-dev-2bebea57c2efeb7c4e981f5ff76bdca7e58ab815.zip
drm/i915/cdclk: hide struct intel_cdclk_vals
The definition is not needed outside of intel_cdclk.c. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f7e7e7fb91eae2b49a0ab5d982a235cec34e3320.1639068649.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/display/intel_cdclk.c8
-rw-r--r--drivers/gpu/drm/i915/display/intel_cdclk.h8
2 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index a216a350006d..c30cf8d2b835 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1219,6 +1219,14 @@ static bool has_cdclk_squasher(struct drm_i915_private *i915)
return IS_DG2(i915);
}
+struct intel_cdclk_vals {
+ u32 cdclk;
+ u16 refclk;
+ u16 waveform;
+ u8 divider; /* CD2X divider * 2 */
+ u8 ratio;
+};
+
static const struct intel_cdclk_vals bxt_cdclk_table[] = {
{ .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
{ .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index bb3a778c506b..fc638522e445 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -16,14 +16,6 @@ struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc_state;
-struct intel_cdclk_vals {
- u32 cdclk;
- u16 refclk;
- u16 waveform;
- u8 divider; /* CD2X divider * 2 */
- u8 ratio;
-};
-
struct intel_cdclk_state {
struct intel_global_state base;