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authorTao Zhou <tao.zhou1@amd.com>2020-12-15 18:04:04 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-12-16 13:27:17 -0500
commit15ed44c0e7129a0967157f7b349e1b3feb26a534 (patch)
treee6177e4b190f6011655bd14fb53a3d336013c9a6 /drivers/gpu
parentdrm/amd/display: Add get_dig_frontend implementation for DCEx (diff)
downloadlinux-dev-15ed44c0e7129a0967157f7b349e1b3feb26a534.tar.xz
linux-dev-15ed44c0e7129a0967157f7b349e1b3feb26a534.zip
drm/amdgpu: set mode1 reset as default for dimgrey_cavefish
Use mode1 reset for dimgrey_cavefish by default. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nv.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index ac02dd707c44..6bee3677394a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -362,6 +362,7 @@ nv_asic_reset_method(struct amdgpu_device *adev)
switch (adev->asic_type) {
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
+ case CHIP_DIMGREY_CAVEFISH:
return AMD_RESET_METHOD_MODE1;
default:
if (smu_baco_is_support(smu))