diff options
| author |   Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2016-06-07 17:19:05 +0300 |
|---|---|---|
| committer |   Mika Kuoppala <mika.kuoppala@intel.com> | 2016-07-15 15:51:25 +0300 |
| commit | 4ac4199434ac1d847e02c61a6e9d1cb35bb91b0e (patch) | |
| tree | 4396354e9b31c2089e79f2540e560a7e5ab0dade /drivers/gpu | |
| parent | drm/i915/gen9: Enable must set chicken bits in config0 reg (diff) | |
| download | linux-dev-4ac4199434ac1d847e02c61a6e9d1cb35bb91b0e.tar.xz linux-dev-4ac4199434ac1d847e02c61a6e9d1cb35bb91b0e.zip | |
drm/i915/kbl: Add WaDisableGamClockGating
According to bspec we need to disable gam unit clock gating on
on kbl revids A0 and B0.
References: HSD#2226858, HSD#1944358
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-14-git-send-email-mika.kuoppala@intel.com
(cherry picked from commit 8aeb7f624fbf8a68a9c67f831d4158a0f80ea920)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 5 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d014b8fabb71..3e16b9dadd92 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6926,6 +6926,7 @@ enum skl_disp_power_wells { #define EDRAM_SETS_IDX(cap) (((cap) >> 8) & 0x3) #define GEN6_UCGCTL1 _MMIO(0x9400) +# define GEN6_GAMUNIT_CLOCK_GATE_DISABLE (1 << 22) # define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE (1 << 16) # define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5) # define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7ae5bfdbf569..3f0f1880d4af 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6722,6 +6722,11 @@ static void kabylake_init_clock_gating(struct drm_device *dev) if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0)) I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + + /* WaDisableGamClockGating:kbl */ + if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0)) + I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) | + GEN6_GAMUNIT_CLOCK_GATE_DISABLE); } static void skylake_init_clock_gating(struct drm_device *dev) |