diff options
| author |   Jani Nikula <jani.nikula@intel.com> | 2021-09-09 15:52:00 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-09-20 18:46:22 +0300 |
| commit | 6114f71b3953407148158476b81c5eb082ef142b (patch) | |
| tree | 4fc872c69dcf8a5c82aa26fe1953d46dbe1e8be1 /drivers/gpu | |
| parent | drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates (diff) | |
| download | linux-dev-6114f71b3953407148158476b81c5eb082ef142b.tar.xz linux-dev-6114f71b3953407148158476b81c5eb082ef142b.zip | |
drm/i915/dp: select 128b/132b channel encoding for UHBR rates
UHBR rates and 128b/132b channel encoding go hand in hand.
v2: Fix check for >= UHBR rates using intel_dp_is_uhbr() (Ville)
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b4ffd0187b306c0abaa08b89ed35c993ad8145c7.1631191763.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_link_training.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 36b35239da83..4f116cd32846 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -495,7 +495,8 @@ intel_dp_prepare_link_train(struct intel_dp *intel_dp, &rate_select, 1); link_config[0] = crtc_state->vrr.enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0; - link_config[1] = DP_SET_ANSI_8B10B; + link_config[1] = intel_dp_is_uhbr(crtc_state) ? + DP_SET_ANSI_128B132B : DP_SET_ANSI_8B10B; drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2); intel_dp->DP |= DP_PORT_EN; |