diff options
| author |   Kenneth Feng <kenneth.feng@amd.com> | 2021-02-03 18:15:13 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-02-09 15:27:19 -0500 |
| commit | 62826b86085dbcd38b88e8829e9650a85e2bc260 (patch) | |
| tree | 880b561d6b547e3c350b3f5c070b356b70ff4c86 /drivers/gpu | |
| parent | drm/amdgpu: enable gfx wave limiting for high priority compute jobs (diff) | |
drm/amd/pm: enable ACDC feature
The power limit and clock ragne are different in AC mode and DC mode.
Firmware does the setting after this feature is enabled.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c index e3ba40d9f83f..cf59f2218b7e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c @@ -294,6 +294,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MM_DPM_PG_BIT); + if (smu->dc_controlled_by_gpio) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ACDC_BIT); + return 0; } |