diff options
| author |   Jani Nikula <jani.nikula@intel.com> | 2016-03-15 21:51:12 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2016-03-16 18:10:54 +0200 |
| commit | 6b93e9c89ee553c1f062cd5c7dcd35e06846568f (patch) | |
| tree | 65969483880f6eb7654f40d87fa23ed423a6ec18 /drivers/gpu | |
| parent | drm/i915/dsi: refactor dsi get hw state readout (diff) | |
| download | linux-dev-6b93e9c89ee553c1f062cd5c7dcd35e06846568f.tar.xz linux-dev-6b93e9c89ee553c1f062cd5c7dcd35e06846568f.zip | |
drm/i915/bxt: fix dsi hw state pipe readout
BXT isn't as limited as BYT and CHT regarding DSI pipes and ports.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/8bea85b86aaf7a15f854a656bf8d3208a3afe0bd.1458070700.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 14 |
2 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 85ceec611412..d4a298f715f4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8144,6 +8144,7 @@ enum skl_disp_power_wells { #define READ_REQUEST_PRIORITY_HIGH (3 << 3) #define RGB_FLIP_TO_BGR (1 << 2) +#define BXT_PIPE_SELECT_SHIFT 7 #define BXT_PIPE_SELECT_MASK (7 << 7) #define BXT_PIPE_SELECT(pipe) ((pipe) << 7) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 32606652bb58..475634667222 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -700,7 +700,19 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, if (!(I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY)) continue; - *pipe = port == PORT_A ? PIPE_A : PIPE_B; + if (IS_BROXTON(dev_priv)) { + u32 tmp = I915_READ(MIPI_CTRL(port)); + tmp &= BXT_PIPE_SELECT_MASK; + tmp >>= BXT_PIPE_SELECT_SHIFT; + + if (WARN_ON(tmp > PIPE_C)) + continue; + + *pipe = tmp; + } else { + *pipe = port == PORT_A ? PIPE_A : PIPE_B; + } + active = true; break; } |