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| author |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-11-26 10:14:14 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-11-28 11:19:32 +0100 |
| commit | 96227287fd3662a406117d1d56d0b9186279bfe7 (patch) | |
| tree | ba148c81c27ecffdafd99f0d7caa055a11139694 /drivers/gpu | |
| parent | drm/fourcc: Fill out all block sizes for P10/12/16 (diff) | |
| download | linux-dev-96227287fd3662a406117d1d56d0b9186279bfe7.tar.xz linux-dev-96227287fd3662a406117d1d56d0b9186279bfe7.zip | |
drm/fourcc: Fill out all block sizes for P210
0 means 1 as the default, but it's mighty confusing if the block size
for the first plane is spelled out explicitly, but not for the 2nd
plane.
No cc: stable because this is just confusion, but 0 functional issue.
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Fixes: 7ba0fee247ee ("drm/fourcc: Add AFBC yuv fourccs for Mali")
Cc: Brian Starkey <brian.starkey@arm.com>
Cc: Ayan Kumar Halder <ayan.halder@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191126091414.226070-2-daniel.vetter@ffwll.ch
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/drm_fourcc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index fe79ce857c8a..b234bfaeda06 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -263,7 +263,7 @@ const struct drm_format_info *__drm_format_info(u32 format) .hsub = 2, .vsub = 2, .is_yuv = true}, { .format = DRM_FORMAT_P210, .depth = 0, .num_planes = 2, .char_per_block = { 2, 4, 0 }, - .block_w = { 1, 0, 0 }, .block_h = { 1, 0, 0 }, .hsub = 2, + .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_VUY101010, .depth = 0, .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1, |