aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu
diff options
context:
space:
mode:
authorYuBiao Wang <YuBiao.Wang@amd.com>2021-11-04 10:50:41 +0800
committerAlex Deucher <alexander.deucher@amd.com>2021-11-05 14:11:20 -0400
commitc4fc13b5818f6e55ca86672dfddd9ea3a4fed470 (patch)
tree1ec148ec7d703f8d8e848ab6920486cb1b827bf6 /drivers/gpu
parentdrm/amdgpu/powerplay: fix sysfs_emit/sysfs_emit_at handling (diff)
downloadlinux-dev-c4fc13b5818f6e55ca86672dfddd9ea3a4fed470.tar.xz
linux-dev-c4fc13b5818f6e55ca86672dfddd9ea3a4fed470.zip
drm/amd/amdgpu: Avoid writing GMC registers under sriov in gmc9
[Why] For Vega10, disabling gart of gfxhub could mess up KIQ and PSP under sriov mode, and lead to DMAR on host side. [How] Skip writing GMC registers under sriov. Signed-off-by: YuBiao Wang <YuBiao.Wang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index bda1542ef1dd..480e41847d7c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -348,6 +348,10 @@ static void gfxhub_v1_0_gart_disable(struct amdgpu_device *adev)
WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL,
i * hub->ctx_distance, 0);
+ if (amdgpu_sriov_vf(adev))
+ /* Avoid write to GMC registers */
+ return;
+
/* Setup TLB control */
tmp = RREG32_SOC15(GC, 0, mmMC_VM_MX_L1_TLB_CNTL);
tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 0);