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authorKevin Wang <kevin1.wang@amd.com>2019-07-11 21:33:17 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-07-12 08:00:10 -0500
commitd36893362d22ff46fdb105ebab12df00bbf23397 (patch)
tree8ee7d860f94123e049bb32e053b114ec90bee2eb /drivers/gpu
parentdrm/amdgpu: support key database loading for navi10 (diff)
downloadlinux-dev-d36893362d22ff46fdb105ebab12df00bbf23397.tar.xz
linux-dev-d36893362d22ff46fdb105ebab12df00bbf23397.zip
drm/amd/powerplay: fix smu clock type change miss error
in the smu module, use the smu_xxxclk type to identify the CLK type use SMU_SCLK, SMU_MCLK to replace PP_SCLK, PP_MCLK. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/powerplay/amdgpu_smu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 3093917adc2d..c382eb901178 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -1385,8 +1385,8 @@ int smu_adjust_power_state_dynamic(struct smu_context *smu,
&soc_mask);
if (ret)
return ret;
- smu_force_clk_levels(smu, PP_SCLK, 1 << sclk_mask);
- smu_force_clk_levels(smu, PP_MCLK, 1 << mclk_mask);
+ smu_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask);
+ smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask);
break;
case AMD_DPM_FORCED_LEVEL_MANUAL: