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| author |   Russell King <rmk+kernel@armlinux.org.uk> | 2019-12-15 16:39:05 +0000 |
|---|---|---|
| committer |   Wolfram Sang <wsa@the-dreams.de> | 2020-01-09 22:21:08 +0100 |
| commit | cf8ce8b80f8bf9669f6ec4e71e16668430febdac (patch) | |
| tree | 8b3afdb2fa09a0a1ae660a53f8799bc3239746f4 /drivers/hwmon | |
| parent | i2c: bcm2835: Store pointer to bus clock (diff) | |
| download | linux-dev-cf8ce8b80f8bf9669f6ec4e71e16668430febdac.tar.xz linux-dev-cf8ce8b80f8bf9669f6ec4e71e16668430febdac.zip | |
i2c: fix bus recovery stop mode timing
The I2C specification states that tsu:sto for standard mode timing must
be at minimum 4us. Pictographically, this is:
SCL: ____/~~~~~~~~~
SDA: _________/~~~~
->| |<- 4us minimum
We are currently waiting 2.5us between asserting SCL and SDA, which is
in violation of the standard. Adjust the timings to ensure that we meet
what is stipulated as the minimum timings to ensure that all devices
correctly interpret the STOP bus transition.
This is more important than trying to generate a square wave with even
duty cycle.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/hwmon')
0 files changed, 0 insertions, 0 deletions