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| author |   Mike Leach <mike.leach@linaro.org> | 2020-07-16 11:57:45 -0600 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-07-21 15:48:40 +0200 |
| commit | bbfb8f3e4e3f10c7b0b76f9159b8a9608abdea91 (patch) | |
| tree | 8925e4ce6a158f397712d024293625f3b46c33b4 /drivers/hwtracing/coresight/coresight-etm-perf.c | |
| parent | coresight: tmc: Update sink types for default selection (diff) | |
| download | linux-dev-bbfb8f3e4e3f10c7b0b76f9159b8a9608abdea91.tar.xz linux-dev-bbfb8f3e4e3f10c7b0b76f9159b8a9608abdea91.zip | |
coresight: etm: perf: Add default sink selection to etm perf
Add default sink selection to the perf trace handling in the etm driver.
Uses the select default sink infrastructure to select a sink for the perf
session, if no other sink is specified.
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-17-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm-perf.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm-perf.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 84f1dcb69827..1a3169e69bb1 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -226,9 +226,6 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, sink = coresight_get_enabled_sink(true); } - if (!sink) - goto err; - mask = &event_data->mask; /* @@ -254,6 +251,16 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, } /* + * No sink provided - look for a default sink for one of the + * devices. At present we only support topology where all CPUs + * use the same sink [N:1], so only need to find one sink. The + * coresight_build_path later will remove any CPU that does not + * attach to the sink, or if we have not found a sink. + */ + if (!sink) + sink = coresight_find_default_sink(csdev); + + /* * Building a path doesn't enable it, it simply builds a * list of devices from source to sink that can be * referenced later when the path is actually needed. @@ -267,6 +274,10 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, *etm_event_cpu_path_ptr(event_data, cpu) = path; } + /* no sink found for any CPU - cannot trace */ + if (!sink) + goto err; + /* If we don't have any CPUs ready for tracing, abort */ cpu = cpumask_first(mask); if (cpu >= nr_cpu_ids) |