diff options
| author |   Leo Yan <leo.yan@linaro.org> | 2022-02-04 23:24:03 +0800 |
|---|---|---|
| committer |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2022-03-11 10:07:55 +0000 |
| commit | ec70b05d5da9ac753868e55607298b0699a7ad27 (patch) | |
| tree | 26c981a1d3830fcb49621d95548a3ff9156d88cf /drivers/hwtracing/coresight/coresight-etm3x-core.c | |
| parent | coresight: etm4x: Don't trace PID for non-root PID namespace (diff) | |
| download | linux-dev-ec70b05d5da9ac753868e55607298b0699a7ad27.tar.xz linux-dev-ec70b05d5da9ac753868e55607298b0699a7ad27.zip | |
coresight: etm3x: Don't trace PID for non-root PID namespace
ETMv3 driver enables PID tracing by directly using perf config from
userspace, this means the tracer will capture PID packets from root
namespace but the profiling session runs in non-root PID namespace.
Finally, the recorded packets can mislead perf reporting with the
mismatched PID values.
This patch changes to only enable PID tracing for root PID namespace.
Note, the hardware supports VMID tracing from ETMv3.5, but the driver
never enables VMID trace, this patch doesn't handle VMID trace (bit 30
in ETMCR register) particularly.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220204152403.71775-5-leo.yan@linaro.org
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm3x-core.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm3x-core.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c index cf64ce73a741..7d413ba8b823 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -340,6 +340,10 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata, config->ctrl = attr->config; + /* Don't trace contextID when runs in non-root PID namespace */ + if (!task_is_in_init_pid_ns(current)) + config->ctrl &= ~ETMCR_CTXID_SIZE; + /* * Possible to have cores with PTM (supports ret stack) and ETM * (never has ret stack) on the same SoC. So if we have a request |