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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2021-04-05 17:42:59 +0100 |
|---|---|---|
| committer |   Mathieu Poirier <mathieu.poirier@linaro.org> | 2021-04-06 16:05:38 -0600 |
| commit | 3e666ad0f8c6648373d1841436903c6483d94820 (patch) | |
| tree | 18edfb55a9ff79e39cea91e98969093a3bb72a5d /drivers/hwtracing/coresight/coresight-etm4x-core.c | |
| parent | coresight: etm4x: Add support for PE OS lock (diff) | |
| download | linux-dev-3e666ad0f8c6648373d1841436903c6483d94820.tar.xz linux-dev-3e666ad0f8c6648373d1841436903c6483d94820.zip | |
coresight: ete: Add support for ETE sysreg access
Add support for handling the system registers for Embedded Trace
Extensions (ETE). ETE shares most of the registers with ETMv4 except
for some and also adds some new registers. Re-arrange the ETMv4x list
to share the common definitions and add the ETE sysreg support.
Cc: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210405164307.1720226-13-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm4x-core.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x-core.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 35802caca32a..3e400fd2e404 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -115,6 +115,38 @@ void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit) } } +static u64 ete_sysreg_read(u32 offset, bool _relaxed, bool _64bit) +{ + u64 res = 0; + + switch (offset) { + ETE_READ_CASES(res) + default : + pr_warn_ratelimited("ete: trying to read unsupported register @%x\n", + offset); + } + + if (!_relaxed) + __iormb(res); /* Imitate the !relaxed I/O helpers */ + + return res; +} + +static void ete_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit) +{ + if (!_relaxed) + __iowmb(); /* Imitate the !relaxed I/O helpers */ + if (!_64bit) + val &= GENMASK(31, 0); + + switch (offset) { + ETE_WRITE_CASES(val) + default : + pr_warn_ratelimited("ete: trying to write to unsupported register @%x\n", + offset); + } +} + static void etm_detect_os_lock(struct etmv4_drvdata *drvdata, struct csdev_access *csa) { |