diff options
| author |   James Clark <james.clark@arm.com> | 2022-03-04 17:19:05 +0000 |
|---|---|---|
| committer |   Mathieu Poirier <mathieu.poirier@linaro.org> | 2022-04-13 11:05:03 -0600 |
| commit | b5bc16ab04fe8b8b2f4276e926672dc4b23bcfe4 (patch) | |
| tree | 1487cdab054bb55a3ce3f309b9a7c7b56b4221ec /drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | |
| parent | coresight: etm4x: Cleanup TRCEVENTCTL1R register accesses (diff) | |
| download | linux-dev-b5bc16ab04fe8b8b2f4276e926672dc4b23bcfe4.tar.xz linux-dev-b5bc16ab04fe8b8b2f4276e926672dc4b23bcfe4.zip | |
coresight: etm4x: Cleanup TRCSTALLCTLR register accesses
This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-9-james.clark@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm4x-sysfs.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 2d29e9daf515..cd24590ea38a 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -397,22 +397,22 @@ static ssize_t mode_store(struct device *dev, /* bit[8], Instruction stall bit */ if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true)) - config->stall_ctrl |= BIT(8); + config->stall_ctrl |= TRCSTALLCTLR_ISTALL; else - config->stall_ctrl &= ~BIT(8); + config->stall_ctrl &= ~TRCSTALLCTLR_ISTALL; /* bit[10], Prioritize instruction trace bit */ if (config->mode & ETM_MODE_INSTPRIO) - config->stall_ctrl |= BIT(10); + config->stall_ctrl |= TRCSTALLCTLR_INSTPRIORITY; else - config->stall_ctrl &= ~BIT(10); + config->stall_ctrl &= ~TRCSTALLCTLR_INSTPRIORITY; /* bit[13], Trace overflow prevention bit */ if ((config->mode & ETM_MODE_NOOVERFLOW) && (drvdata->nooverflow == true)) - config->stall_ctrl |= BIT(13); + config->stall_ctrl |= TRCSTALLCTLR_NOOVERFLOW; else - config->stall_ctrl &= ~BIT(13); + config->stall_ctrl &= ~TRCSTALLCTLR_NOOVERFLOW; /* bit[9] Start/stop logic control bit */ if (config->mode & ETM_MODE_VIEWINST_STARTSTOP) |