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author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2021-02-01 11:13:37 -0700 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-02-04 17:00:33 +0100 |
commit | 1d3eead7e9fba77c310e07d5e296d044abd704eb (patch) | |
tree | 072036a021d81ef2e6cda288e11cf07cec601245 /drivers/hwtracing/coresight/coresight-etm4x.h | |
parent | coresight: etm4x: Check for Software Lock (diff) | |
download | linux-dev-1d3eead7e9fba77c310e07d5e296d044abd704eb.tar.xz linux-dev-1d3eead7e9fba77c310e07d5e296d044abd704eb.zip |
coresight: etm4x: Cleanup secure exception level masks
We rely on the ETM architecture version to decide whether
Secure EL2 is available on the CPU for excluding the level
for address comparators and viewinst main control register.
We must instead use the TRCDIDR3.EXLEVEL_S field to detect
the supported levels.
Link: https://lore.kernel.org/r/20210110224850.1880240-16-suzuki.poulose@arm.com
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-18-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm4x.h')
-rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index fba3c02eea0b..29cd27f53e72 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -557,6 +557,8 @@ /* PowerDown Control Register bits */ #define TRCPDCR_PU BIT(3) +#define TRCACATR_EXLEVEL_SHIFT 8 + /* secure state access levels - TRCACATRn */ #define ETM_EXLEVEL_S_APP BIT(8) #define ETM_EXLEVEL_S_OS BIT(9) @@ -631,7 +633,7 @@ enum etm_impdef_type { * @vmid_mask0: VM ID comparator mask for comparator 0-3. * @vmid_mask1: VM ID comparator mask for comparator 4-7. * @ext_inp: External input selection. - * @arch: ETM architecture version (for arch dependent config). + * @s_ex_level: Secure ELs where tracing is supported. */ struct etmv4_config { u32 mode; @@ -675,7 +677,7 @@ struct etmv4_config { u32 vmid_mask0; u32 vmid_mask1; u32 ext_inp; - u8 arch; + u8 s_ex_level; }; /** |