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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2020-07-16 11:57:46 -0600 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-07-21 15:48:40 +0200 |
| commit | 342c8a1d1d9e418d32fa02d635cf96989f9a986e (patch) | |
| tree | f0a8d4ec0328b3b6a46be5fe9b63d3d139c6b88a /drivers/hwtracing/coresight/coresight-etm4x.h | |
| parent | coresight: etm: perf: Add default sink selection to etm perf (diff) | |
| download | linux-dev-342c8a1d1d9e418d32fa02d635cf96989f9a986e.tar.xz linux-dev-342c8a1d1d9e418d32fa02d635cf96989f9a986e.zip | |
coresight: etm4x: Fix save/restore during cpu idle
The ETM state save/restore incorrectly reads/writes some of the 64bit
registers (e.g, address comparators, vmid/cid comparators etc.) using
32bit accesses. Ensure we use the appropriate width accessors for
the registers.
Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-18-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm4x.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 7da022e87218..b8283e1d6d88 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -334,7 +334,7 @@ struct etmv4_save_state { u64 trcacvr[ETM_MAX_SINGLE_ADDR_CMP]; u64 trcacatr[ETM_MAX_SINGLE_ADDR_CMP]; u64 trccidcvr[ETMv4_MAX_CTXID_CMP]; - u32 trcvmidcvr[ETM_MAX_VMID_CMP]; + u64 trcvmidcvr[ETM_MAX_VMID_CMP]; u32 trccidcctlr0; u32 trccidcctlr1; u32 trcvmidcctlr0; |