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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2021-02-01 11:13:23 -0700 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-02-04 17:00:32 +0100 |
| commit | f6a18f354c587b6a77e71df40c715152328b34ff (patch) | |
| tree | 46d7a774a3bdc05b32bbcd197cb6b9a6d38fd094 /drivers/hwtracing/coresight/coresight-etm4x.h | |
| parent | coresight: etm4x: add AMBA id for Cortex-A55 and Cortex-A75 (diff) | |
| download | linux-dev-f6a18f354c587b6a77e71df40c715152328b34ff.tar.xz linux-dev-f6a18f354c587b6a77e71df40c715152328b34ff.zip | |
coresight: etm4x: Handle access to TRCSSPCICRn
TRCSSPCICR<n> is present only if all of the following are true:
TRCIDR4.NUMSSCC > n.
TRCIDR4.NUMPC > 0b0000 .
TRCSSCSR<n>.PC == 0b1
Add a helper function to check all the conditions.
Link: https://lore.kernel.org/r/20210110224850.1880240-2-suzuki.poulose@arm.com
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-4-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm4x.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 3dd3e0633328..80e480c7fe5c 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -179,6 +179,8 @@ #define TRCSTATR_PMSTABLE_BIT 1 #define ETM_DEFAULT_ADDR_COMP 0 +#define TRCSSCSRn_PC BIT(3) + /* PowerDown Control Register bits */ #define TRCPDCR_PU BIT(3) |