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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2017-10-10 14:32:12 -0600 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-10-20 15:03:06 +0200 |
| commit | 0bbb194c0c33c251ac3d33f46c8fd045d82350e5 (patch) | |
| tree | 4bcde932e0f28bc9efbd2345eb6e82c1e5972c47 /drivers/hwtracing/coresight/coresight-funnel.c | |
| parent | Merge 4.14-rc5 into char-misc-next (diff) | |
| download | linux-dev-0bbb194c0c33c251ac3d33f46c8fd045d82350e5.tar.xz linux-dev-0bbb194c0c33c251ac3d33f46c8fd045d82350e5.zip | |
coresight: Extend the PIDR mask to cover relevant bits in PIDR2
As per coresight standards, PIDR2 register has the following format :
[2-0] - JEP106_bits6to4
[3] - JEDEC, designer ID is specified by JEDEC.
However some of the drivers only use mask of 0x3 for the PIDR2 leaving
bits [3-2] unchecked, which could potentially match the component for
a different device altogether. This patch fixes the mask and the
corresponding id bits for the existing devices.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-funnel.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-funnel.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index 77642e0e955b..fd3c396717f6 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -248,8 +248,8 @@ static const struct dev_pm_ops funnel_dev_pm_ops = { static const struct amba_id funnel_ids[] = { { - .id = 0x0003b908, - .mask = 0x0003ffff, + .id = 0x000bb908, + .mask = 0x000fffff, }, { /* Coresight SoC-600 */ |