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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2021-02-01 11:13:24 -0700 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-02-04 17:00:32 +0100 |
| commit | df81b43802f43c0954a55e5d513e8750a1ab4d31 (patch) | |
| tree | 45aac5f0efd1d530fe4559d48017f33e37eab33b /drivers/hwtracing/coresight/coresight-funnel.c | |
| parent | coresight: etm4x: Handle access to TRCSSPCICRn (diff) | |
| download | linux-dev-df81b43802f43c0954a55e5d513e8750a1ab4d31.tar.xz linux-dev-df81b43802f43c0954a55e5d513e8750a1ab4d31.zip | |
coresight: etm4x: Skip accessing TRCPDCR in save/restore
When the ETM is affected by Qualcomm errata, modifying the
TRCPDCR could cause the system hang. Even though this is
taken care of during enable/disable ETM, the ETM state
save/restore could still access the TRCPDCR. Make sure
we skip the access during the save/restore.
Found by code inspection.
Link: https://lore.kernel.org/r/20210110224850.1880240-3-suzuki.poulose@arm.com
Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit power up")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Tingwei Zhang <tingwei@codeaurora.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-5-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-funnel.c')
0 files changed, 0 insertions, 0 deletions