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| author |   Sudeep Holla <sudeep.holla@arm.com> | 2016-08-25 15:19:09 -0600 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-08-31 13:05:43 +0200 |
| commit | 3224dcc5a6ce919ddef2a387dcb4c47666480ed0 (patch) | |
| tree | 4e58bcd819e6238755770f99a020b5146642a005 /drivers/hwtracing/coresight/coresight-priv.h | |
| parent | coresight: etm4x: request to retain power to the trace unit when active (diff) | |
| download | linux-dev-3224dcc5a6ce919ddef2a387dcb4c47666480ed0.tar.xz linux-dev-3224dcc5a6ce919ddef2a387dcb4c47666480ed0.zip | |
coresight: fix handling of ETM trace register access via sysfs
The ETM registers are classified into 2 categories: trace and management.
The core power domain contains most of the trace unit logic including
all(except TRCOSLAR and TRCOSLSR) the trace registers. The debug power
domain contains the external debugger interface including all management
registers.
This patch adds coresight unit specific function coresight_simple_func
which can be used for ETM trace registers by providing a ETM specific
read function which does smp cross call to ensure the trace core is
powered up before the register is accessed.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-priv.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-priv.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index decfd52b5dc3..39841d1f58e0 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -38,14 +38,19 @@ #define ETM_MODE_EXCL_KERN BIT(30) #define ETM_MODE_EXCL_USER BIT(31) -#define coresight_simple_func(type, name, offset) \ +typedef u32 (*coresight_read_fn)(const struct device *, u32 offset); +#define coresight_simple_func(type, func, name, offset) \ static ssize_t name##_show(struct device *_dev, \ struct device_attribute *attr, char *buf) \ { \ type *drvdata = dev_get_drvdata(_dev->parent); \ + coresight_read_fn fn = func; \ u32 val; \ pm_runtime_get_sync(_dev->parent); \ - val = readl_relaxed(drvdata->base + offset); \ + if (fn) \ + val = fn(_dev->parent, offset); \ + else \ + val = readl_relaxed(drvdata->base + offset); \ pm_runtime_put_sync(_dev->parent); \ return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); \ } \ |