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authorSuzuki K Poulose <suzuki.poulose@arm.com>2017-08-02 10:22:07 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-08-28 16:05:48 +0200
commit6f6ab4fce56bbb0385d3d2d62d8c9f688618d5ac (patch)
tree3690e46baa89428d03baf7c9e3fc493ec6435177 /drivers/hwtracing/coresight/coresight-priv.h
parentcoresight: Use the new helper for defining registers (diff)
downloadlinux-dev-6f6ab4fce56bbb0385d3d2d62d8c9f688618d5ac.tar.xz
linux-dev-6f6ab4fce56bbb0385d3d2d62d8c9f688618d5ac.zip
coresight tmc: Add helpers for accessing 64bit registers
Coresight TMC splits 64bit registers into a pair of 32bit registers (e.g DBA, RRP, RWP). Provide helpers to read/write to these registers. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-priv.h')
-rw-r--r--drivers/hwtracing/coresight/coresight-priv.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index 9fdebb773e71..f1d0e21d8cab 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -127,6 +127,14 @@ coresight_read_reg_pair(void __iomem *addr, s32 lo_offset, s32 hi_offset)
return val;
}
+static inline void coresight_write_reg_pair(void __iomem *addr, u64 val,
+ s32 lo_offset, s32 hi_offset)
+{
+ writel_relaxed((u32)val, addr + lo_offset);
+ if (hi_offset >= 0)
+ writel_relaxed((u32)(val >> 32), addr + hi_offset);
+}
+
void coresight_disable_path(struct list_head *path);
int coresight_enable_path(struct list_head *path, u32 mode);
struct coresight_device *coresight_get_sink(struct list_head *path);